September 1983
Revised February 1999
MM74HC123A
Dual Retriggerable Monostable Multivibrator
put pulse equation is simply: PW = (REXT) (CEXT); where
General Description
PW is in seconds, R is in ohms, and C is in farads. All
inputs are protected from damage due to static discharge
by diodes to VCC and ground.
The MM74HC123A high speed monostable multivibrators
(one shots) utilize advanced silicon-gate CMOS technol-
ogy. They feature speeds comparable to low power Schot-
tky TTL circuitry while retaining the low power and high
noise immunity characteristic of CMOS circuits.
Features
Each multivibrator features both a negative, A, and a posi-
tive, B, transition triggered input, either of which can be
used as an inhibit input. Also included is a clear input that
when taken low resets the one shot. The MM74HC123A
can be triggered on the positive transition of the clear while
A is held LOW and B is held HIGH.
■ Typical propagation delay: 25 ns
■ Wide power supply range: 2V–6V
■ Low quiescent current: 80 µA maximum (74HC Series)
■ Low input current: 1 µA maximum
■ Fanout of 10 LS-TTL loads
■ Simple pulse width formula T = RC
■ Wide pulse range: 400 ns to ∞ (typ)
■ Part to part variation: ±5% (typ)
The MM74HC123A is retriggerable. That is it may be trig-
gered repeatedly while their outputs are generating a pulse
and the pulse will be extended.
Pulse width stability over a wide range of temperature and
supply is achieved using linear CMOS techniques. The out-
■ Schmitt Trigger A & B inputs enable infinite signal input
rise and fall times.
Ordering Code:
Order Number
MM74HC123AM
MM74HC123ASJ
MM74HC123AMTC
MM74HC123AN
Package Number
M16A
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
M16D
MTC16
N16E
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Timing Component
Connection Diagram
Pin Assignment for DIP, SOIC, SOP and TSSOP
Note: Pin 6 and Pin 14 must be hard-wired to GND.
Top View
© 1999 Fairchild Semiconductor Corporation
DS005206.prf
www.fairchildsemi.com