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MM74C90J PDF预览

MM74C90J

更新时间: 2024-01-31 09:09:54
品牌 Logo 应用领域
美国国家半导体 - NSC 计数器
页数 文件大小 规格书
6页 126K
描述
4-Bit Decade, Binary Counter

MM74C90J 数据手册

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February 1988  
MM54C90/MM74C90 4-Bit Decade Counter  
MM54C93/MM74C93 4-Bit Binary Counter  
General Description  
The MM54C90/MM74C90 decade counter and the  
MM54C93/MM74C93 binary counter and complementary  
MOS (CMOS) integrated circuits constructed with N- and  
P-channel enhancement mode transistors. The 4-bit decade  
counter can reset to zero or preset to nine by applying ap-  
All inputs are protected against static discharge damage.  
Features  
Y
Wide supply voltage range  
Guaranteed noise margin  
High noise immunity  
Low power  
3V to 15V  
1V  
Y
Y
Y
propriate logic level on the R , R , R and R inputs.  
01 02 91 92  
0.45 V  
CC  
(typ.)  
Also, a separate flip-flop on the A-bit enables the user to  
operate it as a divide-by-2, 5 or 10 frequency counter. The  
4-bit binary counter can be reset to zero by applying high  
Fan out of 2  
driving 74L  
TTL compatiblity  
Y
The MM54C93/MM74C93 follows the MM54L93/  
MM74L93 Pinout  
logic level on inputs R and R , and a separate flip-flop on  
01 02  
the A-bit enables the user to operate it as a divide-by-2, -8,  
or -16 divider. Counting occurs on the negative going edge  
of the input pulse.  
Connection and Logic Diagrams  
MM54C90/MM74C90  
Dual-In-Line Package  
MM54C93/MM74C93  
Dual-In-Line Package  
TL/F/5889–2  
TL/F/5889–4  
Top View  
Top View  
Order Number MM54C90 or MM74C93  
M54C90/MM74C90  
MM54C93/MM74C93  
TL/F/5889–3  
TL/F/5889–1  
C
1995 National Semiconductor Corporation  
TL/F/5889  
RRD-B30M105/Printed in U. S. A.  

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