MIC4123/4/5
Dual 3A Peak Low-Side MOSFET Drivers
Features
General Description
• Reliable, Low-Power Bipolar/CMOS/DMOS
Construction
The MIC4123/4124/4125 family are highly reliable
BiCMOS/DMOS buffer/driver/MOSFET drivers. They
are higher output current versions of the
MIC4126/4127/4128, which are improved versions of
the MIC4426/4427/4428. All three families are
pin-compatible. The MIC4123/4/5 drivers are capable
of providing reliable service in more demanding
electrical environments than their predecessors. They
will not latch under any conditions within their power
and voltage ratings. They can survive up to 5V of noise
spiking, of either polarity, on the ground pin. They can
accept, without either damage or logic upset, up to half
an amp of reverse current (either polarity) forced back
into their outputs.
• Latch-Up Protected to >200 mA Reverse Current
• Logic Input Withstands Swing to –5V
• High 3A Peak Output Current
• Wide 4.5V to 20V Operating Range
• Drives 1800 pF Capacitance in 25 ns
• Short <50 ns Typical Delay Time
• Delay Times Consistent within Supply Voltage
Change
• Matched Rise and Fall Times
• TTL Logic Input Independent of Supply Voltage
• Low Equivalent 6 pF Input Capacitance
• Low Supply Current
The MIC4123/4/5 series drivers are easier to use, more
flexible in operation, and more forgiving than other
CMOS or bipolar drivers currently available. Their
BiCMOS/DMOS construction dissipates minimum
power and provides rail-to-rail voltage swings.
- 3.5 mA with Logic-1 Input
- 350 μA with Logic-0 Input
• Low 2.3Ω Typical Output Impedance
• Output Voltage Swings within 25 mV of
Ground or VS
Primarily intended for driving power MOSFETs, the
MIC4123/4/5 drivers are suitable for driving other loads
(capacitive, resistive, or inductive) that require
low-impedance, high peak currents, and fast switching
times. Heavily loaded clock lines, coaxial cables, or
piezoelectric transducers are some examples. The
only known limitation on loading is that total power
dissipated in the driver must be kept within the
maximum power dissipation limits of the package.
• ‘426/7/8-, ‘1426/7/8-, ‘4426/7/8-Compatible Pinout
• Inverting, Non-Inverting, and Differential
Configurations
• Exposed Backside Pad Packaging Reduces Heat
- ePad SOIC-8L (θJA = 58°C/W)
- 4 mm x 4 mm VDFN-8L (θJA = 45°C/W)
Package Types
MIC4125
ePad SOIC-8 (ME)
VDFN-8 (ML)
(Top View)
MIC4123
MIC4124
ePad SOIC-8 (ME)
VDFN-8 (ML)
(Top View)
ePad SOIC-8 (ME)
VDFN-8 (ML)
(Top View)
MIC4123
MIC4123
MIC4124
MIC4124
MIC4125
MIC4125
NC
INA
NC
NC
INA
NC
NC
INA
NC
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
2
4
A
B
7
5
2
4
A
B
7
5
2
4
A
B
7
5
OUTA
VS
OUTA
VS
OUTA
VS
GND
INB
GND
INB
GND
INB
OUTB
OUTB
OUTB
Dual
Inverting
Dual
Noninverting
Inverting +
Noninverting
2018 Microchip Technology Inc.
DS20006035A-page 1