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MD1210

更新时间: 2022-11-26 15:18:10
品牌 Logo 应用领域
超科 - SUPERTEX 驱动器
页数 文件大小 规格书
5页 178K
描述
HIGH SPEED DUAL MOSFET DRIVER

MD1210 数据手册

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MD1210  
Initial Release  
High Speed, Dual MOSFET Driver  
Features  
General Description  
6.0ns rise and fall time with 1000pF load  
The Supertex MD1210 is a high speed, dual MOSFET driver. It is  
designed to drive high voltage N- and P-channel MOSFET  
transistors for medical ultrasound applications and other  
application requiring a high output current for a capacitive load.  
The high-speed input stage of the MD1210 can operate from 1.2  
to 5.0 volt logic interface with an optimum operating input signal  
range of 1.8 to 3.3 volts. An adaptive threshold circuit is used to  
set the level translator switch threshold to the average of the input  
logic 0 and logic 1 levels. The input logic levels may be ground  
referenced, even though the driver is putting out bipolar signals.  
The level translator uses a proprietary circuit, which provides DC  
coupling together with high-speed operation.  
2.0A peak output source/sink current  
1.2V to 5V input CMOS compatible  
4.5V to 13V total supply voltage  
Smart Logic threshold  
Low jitter design  
Dual matched channels  
Outputs can swing below ground  
Low inductance package  
Thermally-enhanced package  
Applications  
The output stage of the MD1210 has separate power connections  
enabling the output signal L and H levels to be chosen  
independently from the supply voltages used for the majority of  
the circuit. As an example, the input logic levels may be 0 and 1.8  
volts, the control logic may be powered by +5.0 and –5.0 volts,  
and the output L and H levels may be varied anywhere over the  
range of –5.0 to +5.0 volts. The output stage is capable of peak  
currents of up to ±2.0 amps, depending on the supply voltages  
used and load capacitance present.  
Medical ultrasound imaging  
Piezoelectric transducer drivers  
Nondestructive evaluation  
PIN diode driver  
Clock driver/buffer  
High speed level translator  
The OE pin serves a dual purpose. First, its logic H level is used  
to compute the threshold voltage level for the channel input level  
translators. Secondly, when OE is low, the outputs are disabled,  
with the A output high and the B output low. This assists in  
properly pre-charging the AC coupling capacitors that may be  
used in series in the gate drive circuit of an external PMOS and  
NMOS transistor pair.  
Typical Application Circuit  
NR013105  

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