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MD1210_07

更新时间： 2024-01-13 13:02:59
品牌 Logo 应用领域
超科 - SUPERTEX 驱动器
页数 文件大小 规格书
7页 533K
描述
High Speed Dual MOSFET Driver

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中文翻译

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MD1210_07 数据手册

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MD1210  
High Speed Dual MOSFET Driver  
Features  
General Description  
► 6ns rise and fall time with 1000pF load  
► 2.0A peak output source/sink current  
► 1.2V to 5V input CMOS compatible  
► 4.5V to 13V total supply voltage  
► Smart Logic threshold  
► Low jitter design  
► Two matched channels  
► Outputs can swing below ground  
► Low inductance package  
► Thermally-enhanced package  
The Supertex MD1210 is a high speed, dual MOSFET driver.  
It is designed to drive high voltage P and N-channel MOSFET  
transistors for medical ultrasound and other applications requiring  
a high output current for a capacitive load. The high-speed input  
stage of the MD1210 can operate from 1.2V to 5.0V logic interface  
with an optimum operating input signal range of 1.8V to 3.3V. An  
adaptive threshold circuit is used to set the level translator switch  
threshold to the average of the input logic 0 and logic 1 levels.  
The input logic levels may be ground referenced, even though  
the driver is putting out bipolar signals. The level translator uses  
a proprietary circuit, which provides DC coupling together with  
high-speed operation.  
VDD1, VDD2, and V should be connected to the positive supply  
voltage, and VSS1,HVSS2, and VL should be connected to 0V or to  
Ground.The GND pin is the logic control input signal digital ground.  
The output stage is capable of peak currents of up to 2.0A,  
depending on the supply voltages used and load capacitance  
present.  
Applications  
► Medical ultrasound imaging  
► Piezoelectric transducer drivers  
► Nondestructive evaluation  
► PIN diode driver  
► CCD Clock driver/buffer  
► High speed level translator  
The OE pin serves a dual purpose. First, its logic H level is used  
to compute the threshold voltage level for the channel input level  
translators. Secondly, when OE is low, the outputs are disabled,  
with theAoutput high and the B output low. This assists in properly  
pre-charging the AC coupling capacitors that may be used in  
series in the gate drive circuit of an external PMOS and NMOS  
transistor pair.  
Typical Application Circuit  
+12V  
V
DD1  
VDD2  
VH  
0.47µF  
OE  
INA  
Level  
Shifter  
+100V  
1µF  
OUTA  
Level  
Shifter  
10nF  
10nF  
V
SS2  
VL  
VH  
To Piezoelectric  
Transducer  
3.3V CMOS  
Logic Inputs  
V
DD2  
-100V  
INB  
Level  
Shifter  
1µF  
OUTB  
Supertex  
TC6320TG  
MD1210  
Gnd  
VSS1  
VSS2  
VL  
1234567

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