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MCP6293-EP PDF预览

MCP6293-EP

更新时间: 2024-11-08 00:44:03
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美国微芯 - MICROCHIP /
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36页 570K
描述
1.0 mA, 10 MHz Rail-to-Rail Op Amp

MCP6293-EP 数据手册

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MCP6291/1R/2/3/4/5  
1.0 mA, 10 MHz Rail-to-Rail Op Amp  
Features  
Description  
• Gain Bandwidth Product: 10 MHz (typical)  
• Supply Current: IQ = 1.0 mA  
The Microchip Technology Inc. MCP6291/1R/2/3/4/5  
family of operational amplifiers (op amps) provide wide  
bandwidth for the current. This family has a 10 MHz  
Gain Bandwidth Product (GBWP) and a 65° phase  
margin. This family also operates from a single supply  
voltage as low as 2.4V, while drawing 1 mA (typical)  
quiescent current. In addition, the MCP6291/1R/2/3/4/5  
supports rail-to-rail input and output swing, with a  
common mode input voltage range of VDD + 300 mV to  
VSS – 300 mV. This family of operational amplifiers is  
designed with Microchip’s advanced CMOS process.  
• Supply Voltage: 2.4V to 6.0V  
• Rail-to-Rail Input/Output  
• Extended Temperature Range: -40°C to +125°C  
• Available in Single, Dual and Quad Packages  
• Single with CS (MCP6293)  
• Dual with CS (MCP6295)  
Applications  
The MCP6295 has a Chip Select (CS) input for dual op  
amps in an 8-pin package. This device is manufactured  
by cascading the two op amps, with the output of  
op amp A being connected to the non-inverting input of  
op amp B. The CS input puts the device in a Low-power  
mode.  
• Automotive  
• Portable Equipment  
• Photodiode Amplifier  
• Analog Filters  
• Notebooks and PDAs  
• Battery-Powered Systems  
The MCP6291/1R/2/3/4/5 family operates over the  
Extended Temperature Range of -40°C to +125°C. It  
also has a power supply range of 2.4V to 6.0V.  
Design Aids  
• SPICE Macro Models  
• FilterLab® Software  
• Mindi™ Simulation Tool  
• MAPS (Microchip Advanced Part Selector)  
• Analog Demonstration and Evaluation Boards  
• Application Notes  
Package Types  
MCP6291  
MCP6291  
MCP6291R  
MCP6292  
PDIP, SOIC, MSOP  
PDIP, SOIC, MSOP  
SOT-23-5  
SOT-23-5  
VOUTA  
1
2
3
4
8
7
6
5
NC  
VDD  
8
7
6
5
NC  
1
VDD  
VSS  
VOUT  
VSS  
VOUT  
VDD  
1
2
3
5
4
1
5
4
_
_
VIN  
VIN  
VSS  
-
VDD  
VOUT  
VINA  
2
-
VOUTB  
+
2
3
+
-
+
-
+
_
VINA+ 3  
+
-
VINB  
VIN  
+
VIN  
VIN  
+
VIN–  
VSS  
4
NC  
VINB  
+
MCP6293  
PDIP, SOIC, MSOP  
MCP6293  
MCP6294  
PDIP, SOIC, TSSOP  
MCP6295  
PDIP, SOIC, MSOP  
SOT-23-6  
NC  
1
2
3
4
8 CS  
VOUTA  
V
14  
1
OUTD  
_
VOUTA/VINB  
+
VDD  
8
7
6
5
1
2
3
4
VDD  
CS  
VOUT  
VSS  
1
2
3
6
5
4
_
_
VIN  
VIN  
VSS  
VDD  
7
-
VINA  
2
+ - 13 VIND  
- +  
_
VOUTB  
VINA  
VINA  
VSS  
-
+
+
-
+
VOUT  
NC  
6
5
12  
VINA+ 3  
VIND  
+
_
VINB  
VIN  
+
+
-
VIN  
+
11  
VDD  
4
VSS  
CS  
10  
5
6
7
VINC  
+
_
VINB  
VINB  
+
_
-
-
+ +  
9
VINC  
VOUTB  
8 VOUTC  
© 2007 Microchip Technology Inc.  
DS21812E-page 1  

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