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MCP2561 PDF预览

MCP2561

更新时间: 2024-11-25 12:27:11
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美国微芯 - MICROCHIP /
页数 文件大小 规格书
30页 668K
描述
High-Speed CAN Transceiver

MCP2561 数据手册

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MCP2561/2  
High-Speed CAN Transceiver  
• High ESD Protection on CANH and CANL, Meets  
IEC61000-4-2 greater ±8 kV  
Features:  
• Supports 1 Mb/s Operation  
• Available in PDIP-8L, SOIC-8L and 3x3 DFN-8L  
Temperature ranges:  
• Implements ISO-11898-5 Standard Physical Layer  
Requirements  
- Extended (E): -40°C to +125°C  
- High (H): -40°C to +150°C  
• Very Low Standby Current (5 µA, typical)  
• VIO Supply Pin to Interface Directly to  
CAN Controllers and Microcontrollers with  
1.8V to 5.5V I/O  
Description:  
• SPLIT Output Pin to Stabilize Common Mode in  
Biased Split Termination Schemes  
The MCP2561/2 is a Microchip Technology Inc. second  
generation high-speed CAN transceiver. It serves as an  
interface between a CAN protocol controller and the  
physical two-wire CAN bus.  
• CAN Bus Pins are Disconnected when Device is  
Unpowered  
- An Unpowered Node or Brown-Out Event will  
Not Load the CAN Bus  
The device meets the automotive requirements for  
high-speed (up to 1 Mb/s), low quiescent current,  
electromagnetic compatibility (EMC) and electrostatic  
discharge (ESD).  
• Detection of Ground Fault:  
- Permanent Dominant Detection on TXD  
- Permanent Dominant Detection on Bus  
Package Types  
• Power-on Reset and Voltage Brown-Out  
Protection on VDD and VIO Pin  
MCP2561  
MCP2562  
PDIP, SOIC  
PDIP, SOIC  
• Protection Against Damage Due to Short-Circuit  
Conditions (Positive or Negative Battery Voltage)  
TXD  
VSS  
STBY  
CANH  
1
2
8
TXD  
VSS  
STBY  
CANH  
1
2
8
• Protection Against High-Voltage Transients in  
Automotive Environments  
7
7
VDD 3  
6
5
CANL  
SPLIT  
VDD 3  
6
5
CANL  
VIO  
• Automatic Thermal Shutdown Protection  
• Suitable for 12V and 24V Systems  
4
RXD  
4
RXD  
• Meets or exceeds stringent automotive design  
requirements including “Hardware Requirements  
for LIN, CAN and FlexRay Interfaces in Automo-  
tive Applications”, Version 1.3, May 2012  
MCP2562  
3x3 DFN*  
MCP2561  
3x3 DFN*  
TXD  
VSS  
STBY  
CANH  
1
8
TXD  
VSS  
STBY  
CANH  
1
8
• High-Noise Immunity Due to Differential Bus  
Implementation  
2
3
4
7
6
5
EP  
9
2
3
4
7
6
5
EP  
9
VDD  
RXD  
CANL  
VIO  
VDD  
RXD  
CANL  
SPLIT  
* Includes Exposed Thermal Pad (EP); see Table 1-2  
MCP2561/2 Family Members  
Device  
Feature  
Description  
MCP2561  
MCP2562  
Split pin  
VIO pin  
Common mode stabilization  
Internal level shifter on digital I/O pins  
Note: For ordering information, see the “Product Identification System” section on page 27.  
2013 Microchip Technology Inc.  
DS25167B-page 1  

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