Freescale Semiconductor
Data Sheet: Technical Data
Document Number: MC9S08SC4
Rev. 4, 6/2010
MC9S08SC4 8-Bit
Microcontroller Data Sheet
MC9S08SC4
948F-01
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Breakpoint capability to allow single breakpoint setting
during in-circuit debugging
8-Bit HCS08 Central Processor Unit (CPU)
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Up to 40 MHz HCS08 CPU (central processor unit); up
to 20 MHz bus frequency
Peripherals
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HC08 instruction set with added BGND instruction
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SCI — Serial Communication Interface
— Full-duplex non-return to zero (NRZ)
— LIN master extended break generation
— LIN slave extended break detection
— Wake-up on active edge
On-Chip Memory
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4 KB of FLASH with read/program/erase over full
operating voltage and temperature
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256 bytes of Random-access memory (RAM)
•
•
TPMx — Two 2-channel Timer/PWM modules (TPM1
and TPM2)
Power-Saving Modes
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Two very low power stop modes
— 16-bit modulus or up/down counters
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Reduced power wait mode
— Input capture, output compare, buffered
edge-aligned or center-aligned PWM
Clock Source Options
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Oscillator (XOSC) — Loop-control Pierce oscillator;
Crystal or ceramic resonator range of 32 kHz to 38.4 kHz
or 1 MHz to 16 MHz
ADC — Analog to Digital Converter
— 8-channel, 10-bit resolution
— 2.5 μs conversion time
— Automatic compare function
— Temperature sensor
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Internal Clock Source (ICS) — Internal clock source
module containing a frequency-locked loop (FLL)
controlled by internal or external reference; precision
trimming of internal reference allows 0.2 % resolution
and 2.0 % deviation over temperature and voltage;
supports bus frequencies from 2 MHz to 20 MHz.
— Internal bandgap reference channel
Input/Output
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•
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12 general purpose I/O pins (GPIOs)
System Protection
8 interrupt pins with selectable polarity
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Watchdog computer operating properly (COP) reset with
option to run from dedicated 1 kHz internal clock source
or bus clock
Hysteresis and configurable pull-up device on all input
pins; Configurable slew rate and drive strength on all
output pins.
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Low-voltage detection with reset or interrupt; selectable
trip points
Package Options
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16-TSSOP
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•
•
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Illegal opcode detection with reset
Illegal address detection with reset
FLASH block protect
Operating Parameters
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4.5-5.5 V operation
Reset on loss of clock
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C,V, M temperature ranges available, covering -40 -
125 °C operation
Development Support
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Single-wire background debug interface
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improvements in the design of its products.
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