MC74LVX74

更新时间： 2024-10-01 22:15:07

品牌	Logo	应用领域
安森美 - ONSEMI		/
页数	文件大小	规格书
7页	157K
描述
LOW-VOLTAGE CMOS

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数据手册

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MC74LVX74 数据手册

SEMICONDUCTOR TECHNICAL DATA

The MC74LVX74 is an advanced high speed CMOS D–type flip–flop.

The inputs tolerate voltages up to 7V, allowing the interface of 5V systems

to 3V systems.

The signal level applied to the D input is transferred to O output during

the positive going transition of the Clock pulse.

LOW–VOLTAGE CMOS

Clear (CD) and Set (SD) are independent of the Clock (CP) and are

accomplished by setting the appropriate input Low.

• High Speed: f

= 145MHz (Typ) at V

= 3.3V

max

• Low Power Dissipation: I

= 2µA (Max) at T = 25°C

D SUFFIX

14–LEAD SOIC PACKAGE

CASE 751A–03

• Power Down Protection Provided on Inputs

• Balanced Propagation Delays

• Low Noise: V

= 0.5V (Max)

OLP

• Pin and Function Compatible with Other Standard Logic Families

• Latchup Performance Exceeds 300mA

• ESD Performance: HBM > 2000V; Machine Model > 200V

DT SUFFIX

14–LEAD TSSOP PACKAGE

CASE 948G–01

CD2

CP2 SD2

M SUFFIX

14–LEAD SOIC EIAJ PACKAGE

CASE 965–01

CD1

CP1

SD1

GND

PIN NAMES

Figure 1. 14–Lead Pinout (Top View)

Pins

Function

CP1, CP2

D1, D2

Clock Pulse Inputs

Data Inputs

CD1, CD2

SD1, SD2

On, On

Direct Clear Inputs

Direct Set Inputs

Outputs

6/97

Motorola, Inc. 1997

REV 0

12 3 4 5 6 7

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与MC74LVX74相关器件

型号	品牌	获取价格	描述	数据表
MC74LVX74D	ONSEMI	获取价格	LOW-VOLTAGE CMOS
MC74LVX74DR2	ONSEMI	获取价格	Dual D−Type Flip−Flop with Set and Clear
MC74LVX74DR2G	ONSEMI	获取价格	Dual D−Type Flip−Flop with Set and Clear
MC74LVX74DT	ONSEMI	获取价格	LOW-VOLTAGE CMOS
MC74LVX74DTG	ONSEMI	获取价格	Dual D−Type Flip−Flop with Set and Clear
MC74LVX74DTR2	ONSEMI	获取价格	Dual D−Type Flip−Flop with Set and Clear
MC74LVX74DTR2G	ONSEMI	获取价格	Dual D−Type Flip−Flop with Set and Clear
MC74LVX74M	ONSEMI	获取价格	LOW-VOLTAGE CMOS
MC74LVX74MEL	ONSEMI	获取价格	Dual D−Type Flip−Flop with Set and Clear
MC74LVX74MELG	ONSEMI	获取价格	Dual D−Type Flip−Flop with Set and Clear