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MC74ACT74M PDF预览

MC74ACT74M

更新时间: 2024-11-15 19:53:07
品牌 Logo 应用领域
安森美 - ONSEMI 光电二极管输出元件逻辑集成电路触发器
页数 文件大小 规格书
12页 91K
描述
IC ACT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14, EIAJ-14, FF/Latch

MC74ACT74M 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP14,.3
针数:14Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.47
系列:ACTJESD-30 代码:R-PDSO-G14
JESD-609代码:e4长度:10.2 mm
负载电容(CL):50 pF逻辑集成电路类型:D FLIP-FLOP
最大频率@ Nom-Sup:125000000 Hz最大I(ol):0.024 A
位数:1功能数量:2
端子数量:14最高工作温度:85 °C
最低工作温度:-40 °C输出极性:COMPLEMENTARY
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP14,.3封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V传播延迟(tpd):13 ns
认证状态:Not Qualified座面最大高度:2.05 mm
子类别:FF/Latches最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
触发器类型:POSITIVE EDGE宽度:5.275 mm
最小 fmax:125 MHzBase Number Matches:1

MC74ACT74M 数据手册

 浏览型号MC74ACT74M的Datasheet PDF文件第2页浏览型号MC74ACT74M的Datasheet PDF文件第3页浏览型号MC74ACT74M的Datasheet PDF文件第4页浏览型号MC74ACT74M的Datasheet PDF文件第5页浏览型号MC74ACT74M的Datasheet PDF文件第6页浏览型号MC74ACT74M的Datasheet PDF文件第7页 
MC74AC74, MC74ACT74  
Dual D-Type Positive  
Edge-Triggered Flip-Flop  
The MC74AC74/74ACT74 is a dual D–type flip–flop with  
Asynchronous Clear and Set inputs and complementary (Q,Q)  
outputs. Information at the input is transferred to the outputs on the  
positive edge of the clock pulse. Clock triggering occurs at a voltage  
level of the clock pulse and is not directly related to the transition  
time of the positive-going pulse. After the Clock Pulse input  
threshold voltage has been passed, the Data input is locked out and  
information present will not be transferred to the outputs until the  
next rising edge of the Clock Pulse input.  
http://onsemi.com  
PDIP–14  
N SUFFIX  
CASE 646  
14  
1
Asynchronous Inputs:  
SO–14  
LOW input to S (Set) sets Q to HIGH level  
LOW input to C (Clear) sets Q to LOW level  
D
Clear and Set are independent of clock  
D SUFFIX  
CASE 751A  
D
14  
1
Simultaneous LOW on C and S makes both Q and Q HIGH  
D
D
TSSOP–14  
DT SUFFIX  
CASE 948G  
14  
Outputs Source/Sink 24 mA  
ACT74 Has TTL Compatible Inputs  
1
V
C
D2  
13  
D
CP  
S
D2  
10  
Q
Q
2
CC  
EIAJ–14  
M SUFFIX  
CASE 965  
2
2
2
14  
12  
11  
9
8
14  
1
C
S
D1  
D2  
D
Q
CP  
Q
1
CP  
1
2
2
2
Q
D
C
2
Q
ORDERING INFORMATION  
S
1
1
D1  
D2  
Device  
Package  
PDIP–14  
PDIP–14  
SOIC–14  
Shipping  
MC74AC74N  
MC74ACT74N  
MC74AC74D  
MC74AC74DR2  
25 Units/Rail  
25 Units/Rail  
55 Units/Rail  
1
2
3
CP  
4
5
6
7
C
D
S
D1  
Q
1
Q
1
GND  
D1  
1
1
Figure 1. Pinout: 14–Lead Packages Conductors  
(Top View)  
SOIC–14 2500 Tape & Reel  
SOIC–14 55 Units/Rail  
SOIC–14 2500 Tape & Reel  
TSSOP–14 96 Units/Rail  
TSSOP–14 2500 Tape & Reel  
TSSOP–14 96 Units/Rail  
MC74ACT74D  
MC74ACT74DR2  
MC74AC74DT  
MC74AC74DTR2  
MC74ACT74DT  
PIN ASSIGNMENT  
PIN  
D , D  
FUNCTION  
Data Inputs  
1
2
CP , CP  
Clock Pulse Inputs  
Direct Clear Inputs  
Direct Set Inputs  
Outputs  
1
2
C
S
, C  
D1 D2  
, S  
D1 D2  
MC74ACT74DTR2 TSSOP–14 2500 Tape & Reel  
Q , Q , Q , Q  
2
1
1
2
MC74AC74M  
EIAJ–14  
50 Units/Rail  
MC74AC74MEL  
EIAJ–14 2000 Tape & Reel  
MC74ACT74M  
EIAJ–14  
50 Units/Rail  
MC74ACT74MEL  
EIAJ–14 2000 Tape & Reel  
DEVICE MARKING INFORMATION  
See general marking information in the device marking  
section on page 7 of this data sheet.  
Semiconductor Components Industries, LLC, 2001  
1
Publication Order Number:  
May, 2001 – Rev. 5  
MC74AC74/D  

MC74ACT74M 替代型号

型号 品牌 替代类型 描述 数据表
MC74ACT74MELG ONSEMI

完全替代

Dual D−Type Positive Edge−Triggered Flip−Flop
MC74ACT74MEL ONSEMI

类似代替

Dual D−Type Positive Edge−Triggered Flip−Flop

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