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MC74ACT574ML2 PDF预览

MC74ACT574ML2

更新时间: 2024-11-15 20:51:55
品牌 Logo 应用领域
安森美 - ONSEMI 光电二极管逻辑集成电路触发器
页数 文件大小 规格书
8页 191K
描述
IC IC,FLIP-FLOP,OCTAL,D TYPE,ACT-CMOS,SOP,20PIN,PLASTIC, FF/Latch

MC74ACT574ML2 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:SOP, SOP20,.3Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.92
JESD-30 代码:R-PDSO-G20JESD-609代码:e0
负载电容(CL):50 pF逻辑集成电路类型:D FLIP-FLOP
最大频率@ Nom-Sup:85000000 Hz最大I(ol):0.024 A
功能数量:8端子数量:20
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP20,.3
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TAPE AND REEL电源:5 V
认证状态:Not Qualified子类别:FF/Latches
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
触发器类型:POSITIVE EDGEBase Number Matches:1

MC74ACT574ML2 数据手册

 浏览型号MC74ACT574ML2的Datasheet PDF文件第2页浏览型号MC74ACT574ML2的Datasheet PDF文件第3页浏览型号MC74ACT574ML2的Datasheet PDF文件第4页浏览型号MC74ACT574ML2的Datasheet PDF文件第5页浏览型号MC74ACT574ML2的Datasheet PDF文件第6页浏览型号MC74ACT574ML2的Datasheet PDF文件第7页 
OCTAL D-TYPE  
FLIP-FLOP WITH  
3-STATE OUTPUTS  
The MC74AC574/74ACT574 is a high-speed, low power octal flip-flop with a  
buffered common Clock (CP) and a buffered common Output Enable (OE). The  
information presented to the D inputs is stored in the flip-flops on the LOW-to-HIGH  
Clock (CP) transition.  
The MC74AC574/74ACT574 is functionally identical to the MC74AC374/  
74ACT374 except for the pinouts.  
Inputs and Outputs on Opposite Sides of Package  
Allowing Easy Interface with Microprocessors  
Useful as Input or Output Port for Microprocessors  
Functionally Identical to MC74AC374/74ACT374  
3-State Outputs for Bus-Oriented Applications  
Outputs Source/Sink 24 mA  
N SUFFIX  
CASE 738-03  
PLASTIC  
• ′ACT574 Has TTL Compatible Inputs  
V
O
O
O
O
O
O
O
O
7
CP  
11  
CC  
0
1
2
3
4
5
6
20  
19  
18  
17  
16  
15  
14  
12  
13  
DW SUFFIX  
CASE 751D-04  
PLASTIC  
1
2
3
4
5
6
7
9
8
10  
OE  
D
D
D
D
D
D
D
D
7
GND  
0
1
2
3
4
5
6
LOGIC SYMBOL  
PIN NAMES  
D –D  
0
Data Inputs  
Clock Pulse Input  
7
CP  
D
CP  
D
O
D
O
D
O
D
O
D
O
D
O
D
O
0
1
2
3
4
5
6
7
OE  
O –O  
0
3-State Output Enable Input  
3-State Outputs  
7
OE  
O
0
1
2
3
4
5
6
7
FACT DATA  
5-1  

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