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MC74ACT573DTEL PDF预览

MC74ACT573DTEL

更新时间: 2024-11-15 13:11:19
品牌 Logo 应用领域
安森美 - ONSEMI 锁存器输出元件
页数 文件大小 规格书
12页 126K
描述
IC,LATCH,SINGLE,8-BIT,ACT-CMOS,TSSOP,20PIN,PLASTIC

MC74ACT573DTEL 技术参数

是否Rohs认证:不符合生命周期:Obsolete
Reach Compliance Code:not_compliantHTS代码:8542.39.00.01
风险等级:5.92Is Samacsys:N
JESD-30 代码:R-PDSO-G20JESD-609代码:e0
负载电容(CL):50 pF逻辑集成电路类型:D LATCH
最大I(ol):0.024 A位数:8
功能数量:1端子数量:20
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP20,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TAPE AND REEL电源:5 V
Prop。Delay @ Nom-Sup:12 ns认证状态:Not Qualified
子类别:FF/Latches标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.635 mm
端子位置:DUALBase Number Matches:1

MC74ACT573DTEL 数据手册

 浏览型号MC74ACT573DTEL的Datasheet PDF文件第2页浏览型号MC74ACT573DTEL的Datasheet PDF文件第3页浏览型号MC74ACT573DTEL的Datasheet PDF文件第4页浏览型号MC74ACT573DTEL的Datasheet PDF文件第5页浏览型号MC74ACT573DTEL的Datasheet PDF文件第6页浏览型号MC74ACT573DTEL的Datasheet PDF文件第7页 
MC74AC573, MC74ACT573  
Octal Buffer/Line Driver  
with 3−State Outputs  
The MC74AC573/74ACT573 is a high−speed octal latch with  
buffered common Latch Enable (LE) and buffered common Output  
Enable (OE) inputs.  
The MC74AC573/74ACT573 is functionally identical to the  
MC74AC373/74ACT373 but has inputs and outputs on opposite sides.  
http://onsemi.com  
MARKING  
Features  
DIAGRAM  
Inputs and Outputs on Opposite Sides of Package Allowing Easy  
Interface with Microprocessors  
Useful as Input or Output Port for Microprocessors  
MC74xxx573N  
AWLYYWWG  
20  
Functionally Identical to MC74AC373/74ACT373  
3−State Outputs for Bus Interfacing  
Outputs Source/Sink 24 mA  
1
PDIP−20  
N SUFFIX  
CASE 738  
ACT573 Has TTL Compatible Inputs  
Pb−Free Packages are Available*  
V
O
O
O
O
O
O
5
O
6
O
7
LE  
11  
CC  
0
1
2
3
4
xxx573  
AWLYYWWG  
20  
19  
18  
17  
16  
15  
14  
12  
13  
20  
1
SO−20  
DW SUFFIX  
CASE 751D  
xxx  
573  
1
2
3
4
5
6
7
9
8
10  
20  
OE  
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
GND  
ALYW G  
1
G
Figure 1. Pinout 20−Lead Packages Conductors  
(Top View)  
TSSOP−20  
DT SUFFIX  
CASE 948E  
PIN ASSIGNMENT  
PIN  
FUNCTION  
D −D  
Data Inputs  
0
7
74xxx573  
AWLYWWG  
LE  
Latch Enable Input  
20  
OE  
3−State Output Enable Input  
3−State Latch Outputs  
1
O −O  
0
7
EIAJ−20  
M SUFFIX  
CASE 967  
D
0
D
1
D
2
D D D D D  
3 4 5 6 7  
xxx  
A
= AC or ACT  
= Assembly Location  
WL, L = Wafer Lot  
YY, Y = Year  
LE  
OE  
O
0
O O O O O O O  
1 2 3 4 5 6 7  
WW, W = Work Week  
G or G = Pb−Free Package  
(Note: Microdot may be in either location)  
Figure 2. Logic Symbol  
*For additional information on our Pb−Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 8 of this data sheet.  
© Semiconductor Components Industries, LLC, 2005  
1
Publication Order Number:  
September, 2005 − Rev. 7  
MC74AC573/D  

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