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MC74ACT256D PDF预览

MC74ACT256D

更新时间: 2024-11-14 23:01:31
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 锁存器双倍数据速率
页数 文件大小 规格书
7页 235K
描述
DUAL 4-BIT ADDRESSABLE LATCH

MC74ACT256D 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:751B-05Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.92
其他特性:TWO 1:4 DMUX FOLLOWED BY LATCH; RESET ACTIVE ONLY WHEN LATCH ENABLE IS HIGH系列:ACT
JESD-30 代码:R-PDSO-G16JESD-609代码:e0
长度:9.9 mm负载电容(CL):50 pF
逻辑集成电路类型:D LATCH最大I(ol):0.024 A
位数:2功能数量:1
端子数量:16最高工作温度:85 °C
最低工作温度:-40 °C输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 VProp。Delay @ Nom-Sup:14 ns
传播延迟(tpd):12.5 ns认证状态:Not Qualified
座面最大高度:1.75 mm子类别:FF/Latches
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED触发器类型:LOW LEVEL
宽度:3.9 mmBase Number Matches:1

MC74ACT256D 数据手册

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DUAL 4-BIT  
ADDRESSABLE  
LATCH  
The MC74AC256/74ACT256 dual addressable latch has four distinct modes  
of operation which are selectable by controlling the Clear and Enable inputs  
(see Function Table). In the addressable latch mode, data at the Data (D) inputs  
is written into the addressed latches. The addressed latches will follow the Data  
input with all unaddressed latches remaining in their previous states.  
In the memory mode, all latches remain in their previous states and are  
unaffected by the Data or Address inputs. To eliminate the possibility of entering  
erroneous data in the latches, the enable should be held HIGH (inactive) while  
the address lines are changing. In the dual 1-of-4 decoding or demultiplexing  
mode (MR = E = LOW), addressed outputs will follow the level of the D inputs  
with all other outputs LOW. In the clear mode, all outputs are LOW and unaffected  
by the Address and Data inputs.  
N SUFFIX  
CASE 648-08  
PLASTIC  
Combines Dual Demultiplexer and 8-Bit Latch  
Serial-to-Parallel Capability  
Output from Each Storage Bit Available  
Random (Addressable) Data Entry  
Easily Expandable  
Common Clear Input  
Useful as Dual 1-of-4 Active HIGH Decoder  
D SUFFIX  
CASE 751B-05  
PLASTIC  
V
MR  
15  
E
D
Q
Q
Q
Q
0b  
CC  
16  
b
3b  
12  
2b  
11  
1b  
10  
14  
13  
9
1
2
3
4
5
6
7
8
A
A
D
Q
Q
Q
Q
3a  
GND  
0
1
a
0a  
1a  
2a  
LOGIC SYMBOL  
D
D
b
a
A
A
Q
E
0
MR  
1
Q
Q
Q
Q
Q
Q
Q
0a 1a 2a 3a 0b 1b 2b 3b  
FACT DATA  
5-1  

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