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MC74ACT241DWR2 PDF预览

MC74ACT241DWR2

更新时间: 2024-11-14 05:22:19
品牌 Logo 应用领域
安森美 - ONSEMI 驱动器逻辑集成电路光电二极管输出元件
页数 文件大小 规格书
8页 94K
描述
Octal Buffer/Line Driver with 3−State Outputs

MC74ACT241DWR2 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP20,.4
针数:20Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.06
其他特性:OUTPUT ENABLE ACTIVE HIGH FOR ONE FUNCTION控制类型:ENABLE LOW/HIGH
系列:ACTJESD-30 代码:R-PDSO-G20
JESD-609代码:e0长度:12.8 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.024 A位数:4
功能数量:2端口数量:2
端子数量:20最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP20,.4
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TAPE AND REEL峰值回流温度(摄氏度):240
电源:5 VProp。Delay @ Nom-Sup:10 ns
传播延迟(tpd):10 ns认证状态:Not Qualified
座面最大高度:2.65 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn80Pb20)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:7.5 mm
Base Number Matches:1

MC74ACT241DWR2 数据手册

 浏览型号MC74ACT241DWR2的Datasheet PDF文件第2页浏览型号MC74ACT241DWR2的Datasheet PDF文件第3页浏览型号MC74ACT241DWR2的Datasheet PDF文件第4页浏览型号MC74ACT241DWR2的Datasheet PDF文件第5页浏览型号MC74ACT241DWR2的Datasheet PDF文件第6页浏览型号MC74ACT241DWR2的Datasheet PDF文件第7页 
MC74ACT241  
Octal Buffer/Line Driver  
with 3−State Outputs  
The MC74ACT241 is an octal buffer and line driver designed to be  
employed as a memory address driver, clock driver and bus oriented  
transmitter or receiver which provides improved PC board density.  
http://onsemi.com  
MARKING  
Features  
3−State Outputs Drive Bus Lines or Buffer Memory Address  
Registers  
DIAGRAMS  
Outputs Source/Sink 24 mA  
TTL Compatible Inputs  
20  
1
Pb−Free Packages are Available  
ACT241  
AWLYYWWG  
1
SOIC−20W  
DW SUFFIX  
CASE 751D  
V
OE  
19  
YA  
DB  
YA  
DB  
YA  
DB  
YA  
DB  
1
CC  
2
1
4
2
3
3
2
4
20  
18  
17  
16  
15  
14  
12  
13  
11  
20  
ACT  
241  
1
OE  
2
3
YB  
4
DA  
5
YB  
6
DA  
7
YB  
8
DA  
9
YB  
10  
1
ALYWG  
TSSOP−20  
DT SUFFIX  
CASE 948E  
DA  
GND  
1
1
4
2
3
3
2
4
1
G
Figure 1. Pinout: 20−Lead Packages Conductors  
1
(Top View)  
TRUTH TABLE  
Inputs  
OE  
Outputs  
20  
1
D
(Pins 12, 14, 16, 18)  
1
1
74ACT241  
AWLYWWG  
SOEIAJ−20  
M SUFFIX  
CASE 967  
L
L
L
H
X
L
H
Z
H
H = HIGH Voltage Level  
L = LOW Voltage Level  
X = Immaterial  
A
WL, L  
YY, Y  
= Assembly Location  
= Wafer Lot  
= Year  
Z = High Impedance  
WW, W = Work Week  
TRUTH TABLE  
G or G  
= Pb−Free Package  
Inputs  
OE  
Outputs  
(Note: Microdot may be in either location)  
D
(Pins 3, 5, 7, 9)  
2
H
H
L
L
H
X
L
H
Z
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 5 of this data sheet.  
H = HIGH Voltage Level  
L = LOW Voltage Level  
X = Immaterial  
Z = High Impedance  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
December, 2006 − Rev. 5  
MC74ACT241/D  

MC74ACT241DWR2 替代型号

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