The MC14543B BCD–to–seven segment latch/decoder/driver is
designed for use with liquid crystal readouts, and is constructed with
complementary MOS (CMOS) enhancement mode devices. The
circuit provides the functions of a 4–bit storage latch and an 8421
BCD–to–seven segment decoder and driver. The device has the
capability to invert the logic levels of the output combination. The
phase (Ph), blanking (BI), and latch disable (LD) inputs are used to
reverse the truth table phase, blank the display, and store a BCD code,
respectively. For liquid crystal (LC) readouts, a square wave is applied
to the Ph input of the circuit and the electrically common backplane of
the display. The outputs of the circuit are connected directly to the
segments of the LC readout. For other types of readouts, such as
light–emitting diode (LED), incandescent, gas discharge, and
fluorescent readouts, connection diagrams are given on this data sheet.
Applications include instrument (e.g., counter, DVM etc.) display
driver, computer/calculator display driver, cockpit display driver, and
various clock, watch, and timer uses.
http://onsemi.com
MARKING
DIAGRAMS
16
PDIP–16
P SUFFIX
CASE 648
MC14543BCP
AWLYYWW
1
16
SOIC–16
D SUFFIX
CASE 751B
14543B
AWLYWW
1
16
SOEIAJ–16
F SUFFIX
CASE 966
MC14543B
AWLYWW
• Latch Storage of Code
• Blanking Input
1
• Readout Blanking on All Illegal Input Combinations
• Direct LED (Common Anode or Cathode) Driving Capability
• Supply Voltage Range = 3.0 V to 18 V
A
= Assembly Location
WL or L = Wafer Lot
YY or Y = Year
WW or W = Work Week
• Capable of Driving 2 Low–power TTL Loads, 1 Low–power Schottky
TTL Load or 2 HTL Loads Over the Rated Temperature Range
• Pin–for–Pin Replacement for CD4056A (with Pin 7 Tied to V ).
SS
ORDERING INFORMATION
• Chip Complexity: 207 FETs or 52 Equivalent Gates
Device
Package
PDIP–16
SOIC–16
Shipping
MAXIMUM RATINGS (Voltages Referenced to V ) (Note 2.)
SS
MC14543BCP
MC14543BD
2000/Box
48/Rail
Symbol
Parameter
Value
Unit
V
V
DC Supply Voltage Range
Input Voltage Range, All Inputs
DC Input Current per Pin
–0.5 to +18.0
DD
MC14543BDR2
SOIC–16 2500/Tape & Reel
V
–0.5 to V + 0.5
V
in
DD
MC14543BF
SOEIAJ–16
SOEIAJ–16
See Note 1.
See Note 1.
I
±10
mA
mW
in
MC14543BFEL
P
D
Power Dissipation,
500
per Package (Note 3.)
1. For ordering information on the EIAJ version of
the SOIC packages, please contact your local
ON Semiconductor representative.
T
A
Operating Temperature Range
Storage Temperature Range
–55 to +125
–65 to +150
°C
°C
T
stg
I
I
Maximum Continuous Output
Drive Current (Source or Sink)
10
mA
This device contains protection circuitry to guard
against damage due to high static voltages or electric
fields. However, precautions must be taken to avoid ap-
plications of any voltage higher than maximum rated
voltages to this high–impedance circuit. For proper
operation, V and V should be constrained to the
OHmax
(per Output)
OLmax
P
P
Maximum Continuous Output
70
mW
OHmax
(4.)
Power (Source or Sink)
(per Output)
OLmax
2. Maximum Ratings are those values beyond which damage to the device
may occur.
in
out
range V
(V or V
)
V
DD
.
SS
in
out
3. Temperature Derating:
Unused inputs must always be tied to an appropriate
logicvoltagelevel(e.g., eitherV orV ). Unusedout-
puts must be left open.
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C
SS
DD
4. P
= I (V – V ) and P
= I (V – V
)
OHmax
OH
OH
DD
OLmax
OL
OL
SS
Semiconductor Components Industries, LLC, 2000
1
Publication Order Number:
March, 2000 – Rev. 3
MC14543B/D