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MC14536BCPS PDF预览

MC14536BCPS

更新时间: 2024-02-20 05:05:16
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA /
页数 文件大小 规格书
13页 333K
描述
Analog Waveform Generation Function, CMOS, PDIP16

MC14536BCPS 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP,针数:16
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.6计数方向:UP
系列:4000/14000/40000JESD-30 代码:R-PDSO-G16
JESD-609代码:e4长度:10.2 mm
负载/预设输入:YES逻辑集成电路类型:BINARY COUNTER
工作模式:SYNCHRONOUS湿度敏感等级:3
位数:4功能数量:1
端子数量:16最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
传播延迟(tpd):14000 ns认证状态:Not Qualified
座面最大高度:2.05 mm最大供电电压 (Vsup):18 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):5 V
表面贴装:YES温度等级:MILITARY
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40触发器类型:POSITIVE EDGE
宽度:5.275 mm最小 fmax:2 MHz
Base Number Matches:1

MC14536BCPS 数据手册

 浏览型号MC14536BCPS的Datasheet PDF文件第6页浏览型号MC14536BCPS的Datasheet PDF文件第7页浏览型号MC14536BCPS的Datasheet PDF文件第8页浏览型号MC14536BCPS的Datasheet PDF文件第10页浏览型号MC14536BCPS的Datasheet PDF文件第11页浏览型号MC14536BCPS的Datasheet PDF文件第12页 
+V  
16  
V
6
9
DD  
8–BYPASS  
4
5
A
OUT 1  
OUT 2  
10  
11  
12  
2
B
C
D
RESET  
OSC INH  
MONO–IN  
SET  
14  
15  
1
PULSE  
GEN.  
7
CLOCK INH  
3
13  
DECODE OUT  
IN  
1
PULSE  
GEN.  
V
SS  
8
CLOCK  
IN  
1
SET  
CLOCK INH  
DECODE OUT  
POWER UP  
NOTE: When power is first applied to the device, Decode Out can be either at a high or low state.  
On the rising edge of a Set pulse the output goes high if initially at a low state. The output  
remains high if initially at a high state. Because Clock Inh is held high, the clock source on  
the input pin has no effect on the output. Once Clock Inh is taken low, the output goes low  
on the first negative clock transition. The output returns high depending on the 8–Bypass,  
n
A, B, C, and D inputs, and the clock input period. A 2 frequency division (where n = the  
0
number of stages selected from the truth table) is obtainable at Decode Out. A 2 –divided  
output of IN can be obtained at OUT and OUT .  
1
1
2
Figure 9. Time Interval Configuration Using an External Clock, Set,  
and Clock Inhibit Functions  
(Divide–by–2 Configured)  
MOTOROLA CMOS LOGIC DATA  
MC14536B  
9

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