MC14175B
Quad Type D Flip−Flop
The MC14175B quad type D flip−flop is constructed with MOS
P−channel and N−channel enhancement mode devices in a single
monolithic structure. Each of the four flip−flops is positive−edge
triggered by a common clock input (C). An active−low reset input (R)
asynchronously resets all flip−flops. Each flip−flop has independent
Data (D) inputs and complementary outputs (Q and Q). These devices
may be used as shift register elements or as type T flip−flops for
counter and toggle applications.
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MARKING
DIAGRAMS
Features
16
PDIP−16
P SUFFIX
CASE 648
• Complementary Outputs
MC14175BCP
AWLYYWWG
• Static Operation
1
• All Inputs and Outputs Buffered
• Diode Protection on All Inputs
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
1
16
SOIC−16
D SUFFIX
CASE 751B
14175BG
AWLYWW
• Output Compatible with Two Low−Power TTL Loads or One
Low−Power Schottky TTL Load
1
1
• Functional Equivalent to TTL 74175
• Pb−Free Packages are Available*
16
SOEIAJ−16
MC14175B
ALYWG
MAXIMUM RATINGS (Voltages Referenced to V
)
F SUFFIX
CASE 966
1
SS
Parameter
Symbol
Value
Unit
V
1
DC Supply Voltage Range
V
DD
−0.5 to +18.0
A
= Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
Input or Output Voltage Range
(DC or Transient)
V , V
in out
−0.5 to V
+ 0.5
V
DD
Input or Output Current (DC or Transient)
per Pin
I , I
in out
10
mA
G
= Pb−Free Package
Power Dissipation per Package (Note 1)
Ambient Temperature Range
P
500
mW
°C
D
ORDERING INFORMATION
T
A
−55 to +125
−65 to +150
260
†
Device
Package
Shipping
Storage Temperature Range
°C
MC14175BCP
PDIP−16
25 Units/Rail
25 Units/Rail
Lead Temperature (8−Second Soldering)
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Temperature Derating: Plastic “P and D/DW”
MC14175BCPG
PDIP−16
(Pb−Free)
MC14175BD
SOIC−16
48 Units/Rail
48 Units/Rail
Packages: – 7.0 mW/_C From 65_C To 125_C
MC14175BDG
SOIC−16
(Pb−Free)
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
MC14175BDR2
SOIC−16
2500/Tape & Reel
2500/Tape & Reel
high−impedance circuit. For proper operation, V and V should be constrained
in
out
MC14175BDR2G SOIC−16
(Pb−Free)
to the range V v (V or V ) v V
.
SS
in
out
DD
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either V or V ). Unused outputs must be left open.
MC14175BFEL
SOEIAJ−16
SS
DD
2000/Tape & Reel
2000/Tape & Reel
MC14175BFELG SOEIAJ−16
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
June, 2006 − Rev. 6
MC14175B/D