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MC14060BD PDF预览

MC14060BD

更新时间: 2024-11-18 22:58:11
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 计数器触发器逻辑集成电路光电二极管输出元件输入元件
页数 文件大小 规格书
6页 241K
描述
14-Bit Binary Counter and Osecillator

MC14060BD 技术参数

生命周期:Transferred零件包装代码:SOIC
包装说明:SOP, SOP16,.25针数:16
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.38其他特性:OUTPUTS FROM 10 STAGES AVAILABLE; BUILT-IN OSCILLATOR; OSCILLATOR DISABLED BY CLEAR INPUT
计数方向:UP系列:4000/14000/40000
JESD-30 代码:R-PDSO-G16JESD-609代码:e0
长度:9.9 mm负载电容(CL):50 pF
负载/预设输入:NO逻辑集成电路类型:BINARY COUNTER
最大频率@ Nom-Sup:12000000 Hz最大I(ol):0.00088 A
工作模式:ASYNCHRONOUS位数:14
功能数量:1端子数量:16
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE电源:5/15 V
传播延迟(tpd):740 ns认证状态:Not Qualified
座面最大高度:1.75 mm子类别:Counters
最大供电电压 (Vsup):18 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
触发器类型:NEGATIVE EDGE宽度:3.9 mm
最小 fmax:3.5 MHzBase Number Matches:1

MC14060BD 数据手册

 浏览型号MC14060BD的Datasheet PDF文件第2页浏览型号MC14060BD的Datasheet PDF文件第3页浏览型号MC14060BD的Datasheet PDF文件第4页浏览型号MC14060BD的Datasheet PDF文件第5页浏览型号MC14060BD的Datasheet PDF文件第6页 
SEMICONDUCTOR TECHNICAL DATA  
L SUFFIX  
CERAMIC  
CASE 620  
The MC14060B is a 14–stage binary ripple counter with an on–chip  
oscillator buffer. The oscillator configuration allows design of either RC or  
crystal oscillator circuits. Also included on the chip is a reset function which  
places all outputs into the zero state and disables the oscillator. A negative  
transition on Clock will advance the counter to the next state. Schmitt trigger  
action on the input line permits very slow input rise and fall times.  
Applications include time delay circuits, counter controls, and frequency  
dividing circuits.  
P SUFFIX  
PLASTIC  
CASE 648  
D SUFFIX  
SOIC  
CASE 751B  
Fully static operation  
Diode Protection on All Inputs  
Supply Voltage Range = 3.0 V to 18 V  
Capable of Driving Two Low–power TTL Loads or One Low–power  
Schottky TTL Load Over the Rated Temperature Range  
Buffered Outputs Available from Stages 4 Through 10 and  
12 Through 14  
ORDERING INFORMATION  
MC14XXXBCP  
MC14XXXBCL  
MC14XXXBD  
Plastic  
Ceramic  
SOIC  
Common Reset Line  
Pin–for–Pin Replacement for CD4060B  
T
A
= – 55° to 125°C for all packages.  
TRUTH TABLE  
PIN ASSIGNMENT  
Clock  
Reset  
Output State  
Q12  
Q13  
Q14  
Q6  
1
2
16  
15  
V
DD  
L
L
H
No Change  
Advance to next state  
All Outputs are low  
Q10  
X
3
4
5
6
7
8
14  
13  
12  
11  
10  
9
Q8  
X = Don’t Care  
Q9  
Q5  
RESET  
CLOCK  
OUT 1  
OUT 2  
Q7  
Q4  
V
SS  
LOGIC DIAGRAM  
OUT 2  
9
10  
11  
Q4  
Q5  
Q12  
Q13  
Q14  
OUT 1  
7
5
1
2
3
CLOCK  
C
C
Q
Q
C
C
Q
Q
C
C
Q
Q
C
C
Q
Q
C
C
Q
Q
C
C
Q
Q
R
R
R
R
R
R
RESET  
12  
Q6 = PIN 4 Q8 = PIN 14 Q10 = PIN 15  
Q7 = PIN 6 Q9 = PIN 13  
V
V
= PIN 16  
= PIN 8  
DD  
SS  
REV 3  
1/94  
Motorola, Inc. 1995  

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