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MC100LVEL31DTG PDF预览

MC100LVEL31DTG

更新时间: 2024-11-24 05:30:07
品牌 Logo 应用领域
安森美 - ONSEMI 触发器
页数 文件大小 规格书
8页 137K
描述
3.3V ECL D Flip-Flop with Set and Reset

MC100LVEL31DTG 技术参数

是否无铅: 不含铅生命周期:Active
零件包装代码:SOIC包装说明:TSSOP, TSSOP8,.19
针数:8Reach Compliance Code:compliant
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:1.03其他特性:NECL MODE: VCC = 0V WITH VEE = -3V TO -3.8V
系列:100LVELJESD-30 代码:S-PDSO-G8
JESD-609代码:e3长度:3 mm
逻辑集成电路类型:D FLIP-FLOP最大频率@ Nom-Sup:2900000000 Hz
湿度敏感等级:3位数:1
功能数量:1端子数量:8
最高工作温度:85 °C最低工作温度:-40 °C
输出极性:COMPLEMENTARY封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP8,.19
封装形状:SQUARE封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:RAIL峰值回流温度(摄氏度):260
电源:-3.3 V最大电源电流(ICC):38 mA
传播延迟(tpd):0.59 ns认证状态:Not Qualified
座面最大高度:1.1 mm子类别:FF/Latches
最大供电电压 (Vsup):3.8 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:ECL温度等级:INDUSTRIAL
端子面层:Tin (Sn)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40触发器类型:POSITIVE EDGE
宽度:3 mm最小 fmax:2900 MHz
Base Number Matches:1

MC100LVEL31DTG 数据手册

 浏览型号MC100LVEL31DTG的Datasheet PDF文件第2页浏览型号MC100LVEL31DTG的Datasheet PDF文件第3页浏览型号MC100LVEL31DTG的Datasheet PDF文件第4页浏览型号MC100LVEL31DTG的Datasheet PDF文件第5页浏览型号MC100LVEL31DTG的Datasheet PDF文件第6页浏览型号MC100LVEL31DTG的Datasheet PDF文件第7页 
MC100LVEL31  
3.3VꢀECL D Flip-Flop  
with Set and Reset  
Description  
The MC100LVEL31 is a D flip-flop with set and reset. The device is  
functionally equivalent to the EL31 device but operates from a 3.3 V  
supply. With propagation delays and output transition times essentially  
equivalent to the EL31, the LVEL31 is ideally suited for those  
applications which require the ultimate in AC performance at low power  
supply voltages.  
Both set and reset inputs are asynchronous, level triggered signals.  
Data enters the master portion of the flip-flop when clock is LOW and is  
transferred to the slave, and thus the outputs, upon a positive transition of  
the clock.  
http://onsemi.com  
MARKING  
DIAGRAMS*  
8
8
1
KVL31  
ALYW  
G
SOIC8  
D SUFFIX  
CASE 751  
1
8
Features  
475 ps Typical Propagation Delay  
2.9 GHz Toggle Frequency  
ESD Protection: >4 kV Human Body Model,  
>200 V Machine Model  
8
1
KV31  
ALYWG  
TSSOP8  
DT SUFFIX  
CASE 948R  
G
1
The 100 Series Contains Temperature Compensation  
PECL Mode Operating Range: V = 3.0 V to 3.8 V  
CC  
with V = 0 V  
EE  
NECL Mode Operating Range: V = 0 V  
CC  
with V = 3.0 V to 3.8 V  
EE  
Internal Input Pulldown Resistors  
1
4
Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test  
Moisture Sensitivity Level 1  
For Additional Information, see Application Note AND8003/D  
Flammability Rating: UL 94 V0 @ 0.125 in,  
Oxygen Index: 28 to 34  
DFN8  
MN SUFFIX  
CASE 506AA  
A
L
= Assembly Location  
= Wafer Lot  
Y
= Year  
Transistor Count = 121 devices  
PbFree Packages are Available  
W = Work Week  
M = Date Code  
G
= PbFree Package  
(Note: Microdot may be in either location)  
*For additional marking information, refer to  
Application Note AND8002/D.  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 5 of this data sheet.  
© Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
December, 2006 Rev. 3  
MC100LVEL31/D  

MC100LVEL31DTG 替代型号

型号 品牌 替代类型 描述 数据表
MC100LVEL31DTR2G ONSEMI

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3.3V ECL D Flip-Flop with Set and Reset
MC100EP31DTG ONSEMI

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3.3V / 5V ECL D Flip−Flop with Set and Reset
MC100LVEL51DTR2G ONSEMI

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3.3V ECL Differential Clock D Flip-Flop

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