Datasheet > MC100E160

MC100E160

更新时间： 2024-09-28 22:46:23

品牌	Logo	应用领域
安森美 - ONSEMI		/
页数	文件大小	规格书
4页	110K
描述
12-BIT PARITY GENERATOR/CHECKER

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数据手册

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MC100E160 数据手册

SEMICONDUCTOR TECHNICAL DATA

The MC10E/100E160 is a 12-bit parity generator/checker. The Q

output is HIGH when an odd number of inputs are HIGH. A HIGH on the

Enable input (EN) forces the Q output LOW.

The E160 also features an output register. Multiplexers direct the

HOLD LOW, or of shifting data in through the S-IN pin by asserting SHIFT

HIGH. The output register itself is clocked by a positive edge on CLK1 or

CLK2 (or both). A HIGH on the reset pin (R) overrides to force the Y

output LOW.

12-BIT PARITY

GENERATOR/CHECKER

• Provides Odd-HIGH Parity of 12 Inputs

• Shiftable Output Register with Hold

• 900ps Max. D to Q/Q Output

• Enable

• Asynchronous Register Reset

• Dual Clocks

• Extended 100E V

Range of – 4.2V to – 5.46V

• 75kΩ Input Pulldown Resistors

FN SUFFIX

PLASTIC PACKAGE

CASE 776-02

Pinout: 28-Lead PLCC (Top View)

CCO

LOGIC DIAGRAM

CCO

MUX

SEL

HOLD S-IN SHIFT CLK1 CLK2

* All V

and V

CCO

pins are tied together on the die.

PIN NAMES

HOLD

S-IN

Function

SHIFT

S-IN

HOLD

SHIFT

– D

Data Inputs

CLK1

CLK2

Serial Data Input

Enable, active LOW

Hold, active LOW

Shift, active HIGH

Clock Inputs

CLK1, CLK2

Reset Inputs

Q, Q

Y, Y

Direct Output

12/93

Motorola, Inc. 1996

REV 2

2–1

12 3 4

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MC100E163FN	ONSEMI	获取价格	5V ECL 2-Bit 8:1 Multiplexer
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MC100E163FNG	ONSEMI	获取价格	5V ECL 2-Bit 8:1 Multiplexer
MC100E163FNR2	ONSEMI	获取价格	5V ECL 2-Bit 8:1 Multiplexer
MC100E163FNR2	MOTOROLA	获取价格	100E SERIES, DUAL 8 LINE TO 1 LINE MULTIPLEXER, COMPLEMENTARY OUTPUT, PQCC28, PLASTIC, LCC
MC100E163FNR2G	ONSEMI	获取价格	5V ECL 2-Bit 8:1 Multiplexer
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