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MC-4516CA727EF-A75 PDF预览

MC-4516CA727EF-A75

更新时间: 2024-01-07 07:29:37
品牌 Logo 应用领域
尔必达 - ELPIDA 存储内存集成电路动态存储器时钟
页数 文件大小 规格书
16页 161K
描述
16M-WORD BY 72-BIT SYNCHRONOUS DYNAMIC RAM MODULE UNBUFFERED TYPE

MC-4516CA727EF-A75 技术参数

生命周期:Transferred零件包装代码:DIMM
包装说明:,针数:168
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.32.00.36风险等级:5.47
访问模式:FOUR BANK PAGE BURST最长访问时间:5.4 ns
其他特性:AUTO/SELF REFRESHJESD-30 代码:R-XDMA-N168
内存密度:1207959552 bit内存集成电路类型:SYNCHRONOUS DRAM MODULE
内存宽度:72功能数量:1
端口数量:1端子数量:168
字数:16777216 words字数代码:16000000
工作模式:SYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:16MX72
封装主体材料:UNSPECIFIED封装形状:RECTANGULAR
封装形式:MICROELECTRONIC ASSEMBLY认证状态:Not Qualified
自我刷新:YES最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):3.3 V
表面贴装:NO技术:CMOS
温度等级:COMMERCIAL端子形式:NO LEAD
端子位置:DUALBase Number Matches:1

MC-4516CA727EF-A75 数据手册

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DATA SHEET  
MOS INTEGRATED CIRCUIT  
MC-4516CA727  
16M-WORD BY 72-BIT SYNCHRONOUS DYNAMIC RAM MODULE  
UNBUFFERED TYPE  
Description  
The MC-4516CA727EF, MC-4516CA727PF and MC-4516CA727XF are 16,777,216 words by 72 bits synchronous  
dynamic RAM module on which 9 pieces of 128M SDRAM: µPD45128841 are assembled.  
This module provides high density and large quantities of memory in a small space without utilizing the surface-  
mounting technology on the printed circuit board.  
Decoupling capacitors are mounted on power supply line for noise reduction.  
Features  
16,777,216 words by 72 bits organization (ECC Type)  
Clock frequency and access time from CLK  
Part number  
MC-4516CA727EF-A75  
MC-4516CA727PF-A75  
MC-4516CA727XF-A75  
/CAS latency  
Clock frequency  
(MAX.)  
Access time from CLK  
(MAX.)  
CL = 3  
CL = 2  
CL = 3  
CL = 2  
CL = 3  
CL = 2  
133 MHz  
100 MHz  
133 MHz  
100 MHz  
133 MHz  
100 MHz  
5.4 ns  
6.0 ns  
5.4 ns  
6.0 ns  
5.4 ns  
6.0 ns  
Fully Synchronous Dynamic RAM, with all signals referenced to a positive clock edge  
Pulsed interface  
Possible to assert random column address in every cycle  
Quad internal banks controlled by BA0 and BA1 (Bank Select)  
Programmable burst-length (1, 2, 4, 8 and full page)  
Programmable wrap sequence (sequential / interleave)  
Programmable /CAS latency (2, 3)  
Automatic precharge and controlled precharge  
CBR (Auto) refresh and self refresh  
All DQs have 10 Ω ±10 % of series resistor  
Single 3.3 V ± 0.3 V power supply  
LVTTL compatible  
4,096 refresh cycles/64 ms  
Burst termination by Burst Stop command and Precharge command  
168-pin dual in-line memory module (Pin pitch = 1.27 mm)  
Unbuffered type  
Serial PD  
The information in this document is subject to change without notice. Before using this document, please  
confirm that this is the latest version.  
Not all devices/types available in every country. Please check with local Elpida Memory, Inc. for  
availability and additional information.  
Document No. E0056N20 (Ver. 2.0)  
Date Published March 2001 CP (K)  
Printed in Japan  
This product became EOL in September, 2002.  
Elpida Memory, Inc. is a joint venture DRAM company of NEC Corporation and Hitachi, Ltd.  

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