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MBM29LV160B-12PCV PDF预览

MBM29LV160B-12PCV

更新时间： 2024-02-15 00:46:03
品牌 Logo 应用领域
飞索 - SPANSION 闪存
页数 文件大小 规格书
58页 735K
描述
FLASH MEMORY CMOS 16M (2M x 8/1M x 16) BIT

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中文翻译

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MBM29LV160B-12PCV 技术参数

生命周期：Obsolete包装说明：PLASTIC, SON-46
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.32.00.51风险等级：5.84
最长访问时间：120 ns其他特性：MINIMUM 100000 PROGRAM/ERASE CYCLES; ALSO CONFIGURABLE AS 1M X 16
启动块：BOTTOMJESD-30 代码：R-PDSO-N46
长度：12 mm内存密度：16777216 bit
内存集成电路类型：FLASH内存宽度：8
功能数量：1端子数量：46
字数：2097152 words字数代码：2000000
工作模式：ASYNCHRONOUS最高工作温度：85 °C
最低工作温度：-40 °C组织：2MX8
封装主体材料：PLASTIC/EPOXY封装代码：VSON
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, VERY THIN PROFILE
并行/串行：PARALLEL编程电压：3 V
认证状态：Not Qualified座面最大高度：0.75 mm
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：2.7 V
标称供电电压 (Vsup)：3 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子形式：NO LEAD端子节距：0.5 mm
端子位置：DUAL类型：NOR TYPE
宽度：10 mmBase Number Matches：1

MBM29LV160B-12PCV 数据手册

 浏览型号MBM29LV160B-12PCV的Datasheet PDF文件第1页浏览型号MBM29LV160B-12PCV的Datasheet PDF文件第3页浏览型号MBM29LV160B-12PCV的Datasheet PDF文件第4页浏览型号MBM29LV160B-12PCV的Datasheet PDF文件第5页浏览型号MBM29LV160B-12PCV的Datasheet PDF文件第6页浏览型号MBM29LV160B-12PCV的Datasheet PDF文件第7页 
FUJITSU SEMICONDUCTOR  
DATA SHEET  
DS05-20846-6E  
FLASH MEMORY  
CMOS  
16M (2M × 8/1M × 16) BIT  
MBM29LV160T-80/-90/-12/MBM29LV160B-80/-90/-12  
■ GENERAL DESCRIPTION  
The MBM29LV160T/B is a 16M-bit, 3.0 V-only Flash memory organized as 2M bytes of 8 bits each or 1M words  
of 16 bits each. The MBM29LV160T/B is offered in a 48-pin TSOP (1), 48-pin CSOP and 48-ball FBGA packages.  
The device is designed to be programmed in-system with the standard system 3.0 V VCC supply. 12.0 V VPP and  
5.0 V VCC are not required for write or erase operations. The device can also be reprogrammed in standard EPROM  
programmers.  
The standard MBM29LV160T/B offers access times of 80 ns and 120 ns, allowing operation of high-speed  
microprocessors without wait states. To eliminate bus contention the device has separate chip enable (CE), write  
enable (WE), and output enable (OE) controls.  
The MBM29LV160T/B is pin and command set compatible with JEDEC standard E2PROMs. Commands are  
written to the command register using standard microprocessor write timings. Register contents serve as input  
to an internal state-machine which controls the erase and programming circuitry. Write cycles also internally latch  
addresses and data needed for the programming and erase operations. Reading data out of the device is similar  
to reading from 5.0 V and 12.0 V Flash or EPROM devices.  
The MBM29LV160T/B is programmed by executing the program command sequence. This will invoke the  
Embedded Program Algorithm which is an internal algorithm that automatically times the program pulse widths  
and verifies proper cell margins. Typically, each sector can be programmed and verified in about 0.5 seconds.  
Erase is accomplished by executing the erase command sequence. This will invoke the Embedded Erase  
Algorithm which is an internal algorithm that automatically preprograms the array if it is not already programmed  
before executing the erase operation. During erase, the device automatically times the erase pulse widths and  
verifies proper cell margins.  
(Continued)  
■ PRODUCT LINE UP  
Part No.  
MBM29LV160T/160B  
+0.3 V  
–0.3 V  
-80  
—
—
—
VCC = 3.3 V  
Ordering Part No.  
+0.6 V  
–0.3 V  
-90  
-12  
VCC = 3.0 V  
Max Address Access Time (ns)  
Max CE Access Time (ns)  
Max OE Access Time (ns)  
80  
80  
30  
90  
90  
35  
120  
120  
50  
1234567...58

中文翻译

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与MBM29LV160B-12PCV相关器件

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MBM29LV160B-12PFTN SPANSION FLASH MEMORY CMOS 16M (2M x 8/1M x 16) BIT

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MBM29LV160B-12PFTN FUJITSU 16M (2M xⅴ 8/1M x 16) BIT

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MBM29LV160B-12PFTN-E1 SPANSION Flash, 1MX16, 120ns, PDSO48, PLASTIC, TSOP1-48

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MBM29LV160B-12PFTN-X FUJITSU 暂无描述

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MBM29LV160B-12PFTR SPANSION FLASH MEMORY CMOS 16M (2M x 8/1M x 16) BIT

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