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MB91354APMT PDF预览

MB91354APMT

更新时间: 2024-11-14 22:36:15
品牌 Logo 应用领域
富士通 - FUJITSU 微控制器和处理器外围集成电路ISM频段时钟
页数 文件大小 规格书
111页 1117K
描述
32-Bit Proprietary Microcontroller

MB91354APMT 技术参数

是否Rohs认证: 符合生命周期:Transferred
零件包装代码:QFP包装说明:LFQFP, QFP176,1.0SQ,20
针数:176Reach Compliance Code:compliant
HTS代码:8542.31.00.01风险等级:5.52
Is Samacsys:N具有ADC:YES
地址总线宽度:24位大小:32
CPU系列:FR最大时钟频率:25 MHz
DAC 通道:YESDMA 通道:YES
外部数据总线宽度:32JESD-30 代码:S-PQFP-G176
JESD-609代码:e6长度:24 mm
I/O 线路数量:126端子数量:176
最高工作温度:85 °C最低工作温度:-40 °C
PWM 通道:YES封装主体材料:PLASTIC/EPOXY
封装代码:LFQFP封装等效代码:QFP176,1.0SQ,20
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE, FINE PITCH
峰值回流温度(摄氏度):260电源:3.3 V
认证状态:Not QualifiedRAM(字节):24576
ROM(单词):524288ROM可编程性:MROM
座面最大高度:1.7 mm速度:50 MHz
子类别:Microcontrollers最大压摆率:220 mA
最大供电电压:3.6 V最小供电电压:3 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:TIN BISMUTH端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:24 mm
uPs/uCs/外围集成电路类型:MICROCONTROLLER, RISCBase Number Matches:1

MB91354APMT 数据手册

 浏览型号MB91354APMT的Datasheet PDF文件第2页浏览型号MB91354APMT的Datasheet PDF文件第3页浏览型号MB91354APMT的Datasheet PDF文件第4页浏览型号MB91354APMT的Datasheet PDF文件第5页浏览型号MB91354APMT的Datasheet PDF文件第6页浏览型号MB91354APMT的Datasheet PDF文件第7页 
FUJITSU SEMICONDUCTOR  
DATA SHEET  
DS07-16504-3E  
32-Bit Proprietary Microcontroller  
CMOS  
FR60 MB91350A Series  
MB91F355A/F356B/355A/354A/V350A  
DESCRIPTION  
The FR families are lines of standard single-chip microcontrollers each based on a 32-bit high-performance RISC  
CPU, incorporating a variety of I/O resources and bus control features for embedded control applications which  
require high CPU performance for  
This FR60 family is based on FR30 and FR40 families and enhanced is bus access. The FR60 family is a line of  
single-chip oriented microcontrollers incorporating a wealth of peripheral resources.  
The FR60 family is optimized for embedded control applications requiring high processing power of the CPU,  
such as DVD player, navigation, high performance Fax machine, and printer controls.  
FEATURES  
1. FR CPU  
• 32-bit RISC, load/store architecture with a five-stage pipeline  
• Maximum operating frequency: 50 MHz (using the PLL at an oscillation frequency of 12.5 MHz)  
• 16-bit fixed length instructions (basic instructions), 1 instruction per cycle  
• Instruction set optimized for embedded applications: Memory-to-memory transfer, bit manipulation, barrel shift  
etc.  
• Instructions adapted for high-level languages: Function entry/exit instructions, multiple-register load/store in-  
structions  
(Continued)  
PACKAGE  
176-pin plastic LQFP  
(FPT-176P-M02)  
I2C license  
Purchase of Fujitsu I2C components conveys a license under the Philips I2C Patent Rights to use, these components in an I2C system  
provided that the system conforms to the I2C Standard Specification as defined by Philips.  

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