MB90350 Series
F2MC-16LX 16-bit Microcontroller
The MB90350-series with 1 channel FULL-CAN interface and Flash ROM is especially designed for automotive and industrial appli-
cations. Its main feature is the on-board CAN interface, which conforms to V2.0 Part A and Part B, while supporting a very flexible
message buffer scheme and so offering more functions than a normal full CAN approach. With the new 0.35μm CMOS technology,
Cypress now offers on-chip Flash-ROM program memory up to 128 Kbytes.
The power supply (3 V) is supplied to the internal MCU core from an internal regulator circuit. This creates a major advantage in terms
of EMI and power consumption.
The internal PLL clock frequency multiplier provides an internal 42 ns instruction execution time from an external 4 MHz clock. Also,
the clock monitor function can monitor main clock and sub clock independently.
As the peripheral resources, the unit features a 4-channel Output Compare Unit, 6-channel Input Capture Unit, 2 separate 16-bit
freerun timers, 2-channel UART and 15-channel 8/10-bit A/D converter.
Features
Clock
Increased processing speed
■ Built-in PLL clock frequency multiplication circuit
■ 4-byte instruction queue
■ Selection of machine clocks (PLL clocks) is allowed among
frequencydivisionbytwoonoscillationclock,andmultiplication
of 1 to 6 times of oscillation clock (for 4 MHz oscillation clock,
4 MHz to 24 MHz).
Powerful interrupt function
■ Powerful 8-level, 34-condition interrupt feature
■ Up to 8 channels external interrupts are supported.
■ Operation by sub clock (up to 50 kHz : 100 kHz oscillation clock
divided by two) is allowed. (devices without S-suffix only)
Automatic data transfer function independent of CPU
■ Extended intelligent I/O service function (EI2OS) : up to 16
channels
■ Minimum execution time of instruction : 42 ns (when operating
with 4-MHz oscillation clock, and 6-time multiplied PLL clock).
■ DMA: up to 16 channels
■ Built-in clock modulation circuit
Low power consumption (standby) mode
16 Mbytes CPU memory space
■ Sleep mode (a mode that halts CPU operating clock)
■ 24-bit internal addressing
■ Main timer mode (a timebase timer mode switched from the
main clock mode)
Clock monitor function (MB90x356x and MB90x357x
only)
■ PLLtimer mode (a timebase timer mode switched from the PLL
clock mode)
■ Main clock or sub clock is monitored independently.
■ Internal CR oscillation clock (100 kHz typical) can be used as
sub clock.
■ Watch mode (a mode that operates sub clock and watch timer
only)
Instruction system best suited to controller
■ Wide choice of data types (bit, byte, word, and long word)
■ Wide choice of addressing modes (23 types)
■ Stop mode (a mode that stops oscillation clock and sub clock)
■ CPU intermittent operation mode
Process
■ Enhanced multiply-divide instructions with sign and RETI
instructions
■ CMOS technology
I/O port
■ Enhanced high-precision computing with 32-bit accumulator
■ General-purpose input/output port (CMOS output)
❐ 49 ports (devices without S-suffix : devices that correspond
to sub clock)
Instruction system compatible with high-level
language (C language) and multitask
❐ 51 ports (devices with S-suffix : devices that do not corre-
spond to sub clock)
■ Employing system stack pointer
■ Enhanced various pointer indirect instructions
■ Barrel shift instructions
Cypress Semiconductor Corporation
Document Number: 002-07872 Rev. *A
•
198 Champion Court
•
San Jose, CA 95134-1709
•
408-943-2600
Revised May 31, 2017
5秒后页面跳转
STM32H743技术深度剖析与应用案例探索
LM321中文资料解析：引脚功能介绍、技术特点、技术特性分析
74HC14芯片资料介绍：性能特性分析、引脚介绍
LM1875芯片手册：功放参数分析、引脚说明、电路设计要点
微信公众号
抖音公众号
浙公网安备 33010502006866号 浙ICP备10014259号-119
营业执照ICP证
数据手册
如果您发现信息不准确，
