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MB90F351TEPMC PDF预览

MB90F351TEPMC

更新时间: 2024-01-25 11:08:09
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 时钟微控制器外围集成电路
页数 文件大小 规格书
84页 1821K
描述
Microcontroller, 16-Bit, FLASH, F2MC-16LX CPU, 24MHz, CMOS, PQFP64, 12 X 12 MM, 1.70 MM HEIGHT, 0.65 MM PITCH, PLASTIC, LFQFP-64

MB90F351TEPMC 技术参数

是否Rohs认证: 不符合生命周期:Active
包装说明:LFQFP-64Reach Compliance Code:compliant
风险等级:5.43具有ADC:YES
地址总线宽度:22位大小:16
CPU系列:F2MC-16LX最大时钟频率:24 MHz
DAC 通道:NODMA 通道:YES
外部数据总线宽度:16JESD-30 代码:S-PQFP-G64
JESD-609代码:e0长度:12 mm
I/O 线路数量:49端子数量:64
最高工作温度:105 °C最低工作温度:-40 °C
PWM 通道:NO封装主体材料:PLASTIC/EPOXY
封装代码:LQFP封装等效代码:QFP64,.55SQ
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE
电源:5 V认证状态:Not Qualified
RAM(字节):4096ROM(单词):32768
ROM可编程性:FLASH座面最大高度:1.7 mm
速度:24 MHz子类别:Microcontrollers
最大压摆率:70 mA最大供电电压:5.5 V
最小供电电压:4 V标称供电电压:5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:TIN LEAD
端子形式:GULL WING端子节距:0.65 mm
端子位置:QUAD宽度:12 mm
uPs/uCs/外围集成电路类型:MICROCONTROLLERBase Number Matches:1

MB90F351TEPMC 数据手册

 浏览型号MB90F351TEPMC的Datasheet PDF文件第2页浏览型号MB90F351TEPMC的Datasheet PDF文件第3页浏览型号MB90F351TEPMC的Datasheet PDF文件第4页浏览型号MB90F351TEPMC的Datasheet PDF文件第5页浏览型号MB90F351TEPMC的Datasheet PDF文件第6页浏览型号MB90F351TEPMC的Datasheet PDF文件第7页 
MB90350E Series  
F2MC-16LX16-bit Microcontrollers  
The MB90350E series, loaded 1 channel FULL-CAN* interface and Flash ROM, is general-purpose Cypress 16-bit microcontroller  
designing for automotive and industrial applications. Its main feature is the on-board CAN interface, which conforms to CAN standard  
Version2.0 Part A and Part B, while supporting a very flexible message buffer scheme and so offering more functions than a normal  
full CAN approach.  
The power supply (3 V) is supplied to the MCU core from an internal regulator circuit. This creates a major advantage in terms of EMI  
and power consumption.  
The PLL clock multiplication circuit provides an internal 42 ns instruction execution time from an external 4 MHz clock. Also, the clock  
supervisor function can monitor main clock and sub clock independently.  
As the peripheral resources, the unit features a 4-channel Output Compare Unit, 6-channel Input Capture Unit, 2 separate 16-bit  
free-run timers, 2-channel LIN-UART and 15-channel 8/10-bit A/D converter built-in.  
: Controller Area Network (CAN) - License of Robert Bosch GmbH  
Features  
Clock  
Powerful interrupt function  
Built-in PLL clock frequency multiplication circuit  
Powerful 8-level, 34-condition interrupt feature  
Up to 8 channels external interrupts are supported.  
Selection of machine clocks (PLL clocks) is allowed among  
frequency division by two on oscillation clock, and multipli-  
cation of 1 to 6 times of oscillation clock (for 4 MHz oscillation  
clock, 4 MHz to 24 MHz).  
Automatic data transfer function independent of  
CPU  
Extended intelligent I/O service function (EI2OS): up to 16  
channels  
Operation by sub clock (up to 50 kHz : 100 kHz oscillation clock  
divided by two) is allowed (devices without S-suffix only) .  
DMA: up to 16 channels  
Minimum execution time of instruction : 42 ns (when operating  
with 4-MHz oscillation clock, and 6-time  
multiplied PLL clock).  
Low power consumption (standby) mode  
Sleep mode (a mode that stops CPU operating clock)  
Built-in clock modulation circuit  
Main timer mode (a timebase timer mode switched from the  
main clock mode)  
16 Mbytes CPU memory space  
24-bit internal addressing  
PLLtimermode(atimebasetimermodeswitchedfromthePLL  
clock mode)  
Instruction system best suited to controller  
Wide choice of data types (bit, byte, word, and long word)  
Wide choice of addressing modes (23 types)  
Watch mode (a mode that operates sub clock and watch timer  
only)  
Stop mode (a mode that stops oscillation clock and sub clock)  
Enhanced multiply-divide instructions with sign and RETI  
instructions  
CPU intermittent operation mode  
Process  
Clock supervisor (MB90x356x and MB90x357x  
only)  
CMOS technology  
Main clock or sub clock is monitored independently.  
I/O port  
Enhanced high-precision computing with 32-bit  
accumulator  
General-purpose input/output port (CMOS output)  
49 ports (devices without S-suffix : devices that correspond to  
sub clock)  
51 ports (devices with S-suffix : devices that do not correspond  
to sub clock)  
Instruction system compatible with high-level  
language (C language) and multitask  
Employing system stack pointer  
Enhanced various pointer indirect instructions  
Barrel shift instructions  
Sub clock pin (X0A, X1A)  
Yes (using the external oscillation) : devices without S-suffix  
No (using the sub clock mode at internal CR oscillation) :  
devices with S-suffix  
Increased processing speed  
4-byte instruction queue  
Timer  
Timebase timer, watch timer, watchdog timer : 1 channel  
Cypress Semiconductor Corporation  
Document Number: 002-04493 Rev. *A  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised April 7, 2016  

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