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MB90567PFM PDF预览

MB90567PFM

更新时间: 2024-11-18 04:41:15
品牌 Logo 应用领域
富士通 - FUJITSU 微控制器和处理器
页数 文件大小 规格书
91页 879K
描述
16-bit Proprietary Microcontrollers

MB90567PFM 技术参数

是否Rohs认证: 不符合生命周期:Transferred
零件包装代码:QFP包装说明:LQFP, QFP64,.5SQ
针数:64Reach Compliance Code:compliant
HTS代码:8542.31.00.01风险等级:5.5
Is Samacsys:N具有ADC:YES
地址总线宽度:位大小:16
CPU系列:F2MC-16LX最大时钟频率:16 MHz
DAC 通道:NODMA 通道:NO
外部数据总线宽度:JESD-30 代码:S-PQFP-G64
JESD-609代码:e0长度:12 mm
I/O 线路数量:51端子数量:64
最高工作温度:85 °C最低工作温度:-40 °C
PWM 通道:NO封装主体材料:PLASTIC/EPOXY
封装代码:LQFP封装等效代码:QFP64,.5SQ
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE
峰值回流温度(摄氏度):NOT SPECIFIED电源:3/3.3 V
认证状态:Not QualifiedRAM(字节):4096
ROM(单词):49152ROM可编程性:MROM
座面最大高度:1.7 mm速度:16 MHz
子类别:Microcontrollers最大压摆率:45 mA
最大供电电压:3.6 V最小供电电压:2.7 V
标称供电电压:3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.65 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:12 mm
uPs/uCs/外围集成电路类型:MICROCONTROLLERBase Number Matches:1

MB90567PFM 数据手册

 浏览型号MB90567PFM的Datasheet PDF文件第2页浏览型号MB90567PFM的Datasheet PDF文件第3页浏览型号MB90567PFM的Datasheet PDF文件第4页浏览型号MB90567PFM的Datasheet PDF文件第5页浏览型号MB90567PFM的Datasheet PDF文件第6页浏览型号MB90567PFM的Datasheet PDF文件第7页 
FUJITSU SEMICONDUCTOR  
DATA SHEET  
DS07-13715-3E  
16-bit Proprietary Microcontrollers  
CMOS  
F2MC-16LX MB90560/565 Series  
MB90561/561A/562/562A/F562/F562B/V560  
MB90567/568/F568  
DESCRIPTION  
The MB90560/565 series is a general-purpose 16-bit microcontroller designed for industrial, OA, and process  
control applications that require high-speed real-time processing. The device features a multi-function timer able  
to output a programmable waveform.  
The microcontroller instruction set is based on the same AT architecture as the F2MC-8L and F2MC-16L families  
with additional instructions for high-level languages, extended addressing modes, enhanced signed multiplication  
and division instructions, and a complete range of bit manipulation instructions. The microcontroller has a  
32-bit accumulator for processing long word (32-bit) data.  
FEATURES  
• Clock  
• Internal oscillator circuit and PLL clock multiplication circuit  
• Oscillation clock  
Clockspeedselectablefromeitherthemachineclock, mainclock, orPLLclock. Themainclockistheoscillation  
clock divided into 2 (0.5 MHz to 8 MHz for a 1 MHz to 16 MHz base oscillation) . The PLL clock is the oscillation  
clock multiplied by one to four (4 MHz to 16 MHz for a 4 MHz base oscillation) .  
• Minimum instruction execution time : 62.5 ns (for oscillation = 4 MHz, PLL clock setting = × 4, VCC = 5.0 V)  
• Maximum CPU memory space : 16 MB  
• 24-bit addressing  
• Bank addressing  
(Continued)  
PACKAGES  
64-pin plastic QFP  
64-pin plastic LQFP  
64-pin plastic SH-DIP  
(FPT-64P-M06)  
(FPT-64P-M09)  
(DIP-64P-M01)  

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