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MB90549GSPMC PDF预览

MB90549GSPMC

更新时间： 2024-11-19 01:13:15
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 时钟微控制器外围集成电路
页数 文件大小 规格书
70页 5564K
描述
CMOS F2MC-16LX MB90540G/545GSeries 16-bit Proprietary Microcontroller

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中文翻译

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MB90549GSPMC 技术参数

是否Rohs认证： 不符合生命周期：Active
包装说明：LFQFP, QFP100,.63SQ,20Reach Compliance Code：compliant
风险等级：5.47具有ADC：YES
地址总线宽度：24位大小：16
CPU系列：F2MC-16LX最大时钟频率：16 MHz
DAC 通道：NODMA 通道：NO
外部数据总线宽度：16JESD-30 代码：S-PQFP-G100
JESD-609代码：e0长度：14 mm
I/O 线路数量：81端子数量：100
最高工作温度：105 °C最低工作温度：-40 °C
PWM 通道：NO封装主体材料：PLASTIC/EPOXY
封装代码：LFQFP封装等效代码：QFP100,.63SQ,20
封装形状：SQUARE封装形式：FLATPACK, LOW PROFILE, FINE PITCH
电源：5 V认证状态：Not Qualified
RAM（字节）：6144ROM（单词）：131072
ROM可编程性：MROM座面最大高度：1.7 mm
速度：16 MHz子类别：Microcontrollers
最大压摆率：55 mA最大供电电压：5.5 V
最小供电电压：4.5 V标称供电电压：5 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Tin/Lead (Sn/Pb)
端子形式：GULL WING端子节距：0.5 mm
端子位置：QUAD宽度：14 mm
uPs/uCs/外围集成电路类型：MICROCONTROLLERBase Number Matches：1

MB90549GSPMC 数据手册

 浏览型号MB90549GSPMC的Datasheet PDF文件第2页浏览型号MB90549GSPMC的Datasheet PDF文件第3页浏览型号MB90549GSPMC的Datasheet PDF文件第4页浏览型号MB90549GSPMC的Datasheet PDF文件第5页浏览型号MB90549GSPMC的Datasheet PDF文件第6页浏览型号MB90549GSPMC的Datasheet PDF文件第7页 
MB90F543G(S)/546G(S)/548G(S)/549G(S)/549G(S)/  
V540GM/B90543G(S)/547G(S)/548G(S)/F548GL(S)  
CMOS F2MC-16LX MB90540G/545G  
Series 16-bit Proprietary Microcontroller  
The MB90540G/545G series with FULL-CAN and Flash ROM is specially designed for automotive and industrial applications. Its  
main features are on-board CAN Interfaces (MB90540G series: 2 channels, MB90545G series: 1 channel) , which conform to CAN  
V2.0A and V2.0B specifications, supporting very flexible message buffer scheme and so offering more functions than a normal full  
CAN approach. The instruction set by F2MC-16LX CPU core inherits an AT architecture of the F2MCfamily with additional instruction  
sets for high-level languages, extended addressing mode, enhanced multiplication/division instructions, and enhanced bit manipula-  
tion instructions.The micro controller has a 32-bit accumulator for processing long word data.The MB90540G/545G series has  
peripheral resources of 8/10-bit A/D converters, UART (SCI) , extended I/O serial interfaces, 8/16-bit timer, I/O timer (input capture  
(ICU) , output compare (OCU) ) .  
Erase can be performed on each block  
Block protection with external programming voltage  
Features  
Clock  
Low-power consumption (stand-by) mode  
Embedded PLL clock multiplication circuit  
Sleep mode (mode in which CPU operating clock is  
Operating clock (PLL clock) can be selected from : divided-  
stopped)  
by-2 of oscillation or one to four times the oscillation  
Stop mode (mode in which oscillation is stopped)  
Minimum instruction execution time : 62.5 ns (operation at  
CPU intermittent operation mode  
oscillation of 4 MHz, PLL four times multiplied :  
Watch mode  
machine clock 16 MHz and at operating VCC = 5.0 V)  
Hardware stand-by mode  
Subsystem Clock : 32 kHz  
Process  
Instruction set to optimize controller applications  
Rich data types (bit, byte, word, long word)  
Rich addressing mode (23 types)  
0.5 m CMOS technology  
I/O port  
General-purpose I/O ports : 81 ports  
Timer  
Enhanced signed multiplication/division instruction and  
RETI instruction functions  
Enhanced precision calculation realized by the 32-bit  
accumulator  
Watchdog timer : 1 channel  
8/16-bit PPG timer : 8/16-bit 4 channels  
16-bit reload timer : 2 channels  
Instruction set designed for high level language (C  
language) and multi-task operations  
Adoption of system stack pointer  
16-bit I/O timer  
16-bit free-run timer : 1 channel  
Input capture : 8 channels  
Output compare : 4 channels  
Enhanced pointer indirect instructions  
Barrel shift instructions  
Program patch function (for two address pointers)  
Enhanced execution speed : 4-byte Instruction queue  
Enhanced interrupt function : 8 levels, 34 factors  
Extended I/O serial interface : 1 channel  
UART0  
With full-duplex double buffer (8-bit length)  
Clock asynchronized or clock synchronized (with start/stop  
bit) transmission can be selectively used.  
Automatic data transmission function independent of CPU  
operation  
UART 1 (SCI)  
Extended intelligent I/O service function (EI2OS)  
With full-duplex double buffer (8-bit length)  
Clock asynchronized or clock synchronized serial (extended  
I/O serial) can be used.  
Embedded ROM size and types  
MASK ROM : 256 Kbytes / 64 Kbytes / 128 Kbytes  
Flash ROM : 128 Kbytes/256 Kbytes  
Embedded RAM size : 2 Kbytes/4 Kbytes/6 Kbytes/8 Kbytes  
(evaluation chip)  
External interrupt circuit (8 channels)  
A module for starting an extended intelligent I/O service  
(EI2OS) and generating an external interrupt which is  
triggered by an external input.  
Flash ROM  
Supports automatic programming, Embedded Algorithm  
Write/Erase/Erase-Suspend/Resume commands  
A flag indicating completion of the algorithm  
Hard-wired reset vector available in order to point to a fixed  
boot sector in Flash Memory  
Delayed interrupt generation module  
Generates an interrupt request for switching tasks.  
8/10-bit A/D converter (8 channels)  
8/10-bit resolution can be selectively used.  
Cypress Semiconductor Corporation  
Document Number: 002- 07696 Rev. *A  
•
198 Champion Court  
•
San Jose, CA 95134-1709  
•
408-943-2600  
Revised 2016 November 30  
1234567...70

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