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MB89PV530-101C PDF预览

MB89PV530-101C

更新时间: 2024-02-13 09:59:58
品牌 Logo 应用领域
富士通 - FUJITSU 微控制器
页数 文件大小 规格书
62页 800K
描述
Microcontroller, 8-Bit, 12.5MHz, CMOS, CDIP64, 1.778 MM PITCH, CERAMIC, DIP-64

MB89PV530-101C 技术参数

生命周期:Transferred包装说明:,
Reach Compliance Code:unknown风险等级:5.46
技术:CMOSuPs/uCs/外围集成电路类型:MICROCONTROLLER
Base Number Matches:1

MB89PV530-101C 数据手册

 浏览型号MB89PV530-101C的Datasheet PDF文件第2页浏览型号MB89PV530-101C的Datasheet PDF文件第3页浏览型号MB89PV530-101C的Datasheet PDF文件第4页浏览型号MB89PV530-101C的Datasheet PDF文件第5页浏览型号MB89PV530-101C的Datasheet PDF文件第6页浏览型号MB89PV530-101C的Datasheet PDF文件第7页 
FUJITSU SEMICONDUCTOR  
DATA SHEET  
DS07-12547-4E  
8-bit Original Microcontroller  
CMOS  
F2MC-8L MB89530A Series  
MB89535A/537A/537AC/538A/538AC/F538  
MB89P538/PV530  
DESCRIPTION  
The MB89530A series is a one-chip microcontroller featuring the F2MC-8L core supporting low-voltage and high-  
speed operation. Built-in peripheral functions include timers, serial interface, A/D converter, and external interrupt.  
This product is an ideal general-purpose one-chip microcontroller for a wide variety of applications from household  
to industrial equipment, as well as use in portable devices.  
FEATURES  
• Wide range of package options  
Two types of QFP packages (1 mm pitch, 0.65 mm pitch)  
LQFP package (0.5 mm pitch)  
SH-DIP package  
• Low voltage, high-speed operating capability  
Minimum instruction execution time 0.32 µs (at base oscillator 12.5 MHz)  
• F2MC-8L CPU Core  
Instruction set optimized for controller operation  
Multiplication/division instructions  
16-bit calculation  
Branching instructions with bit testing  
Bit operation instructions, etc.  
• Five timer systems  
8-bit PWM timer with 2 channels (usable as either interval timer of PWM timer)  
Pulse width count timer (supports continuous measurement or remote control receiving applications)  
16-bit timer counter  
21-bit time base timer  
Watch prescaler (17-bit)  
• UART  
Synchronous or asynchronous operation, switchable  
• 2 serial interfaces (Serial I/O)  
Selection of transfer direction (specify MSB first or LSB first) for communication with a variety of devices  
(Continued)  

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