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MAX98357

更新时间: 2024-09-18 02:52:07
品牌 Logo 应用领域
美信 - MAXIM /
页数 文件大小 规格书
9页 589K
描述
MAX98357 Development Board/ Evaluation System (WLP)

MAX98357 数据手册

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Click here for production status of specific part numbers.  
Evaluates: MAX98357A/MAX98357B  
(WLP)  
MAX98357 Development Board/  
Evaluation System (WLP)  
General Description  
The MAX98357 development board (DEV board) is a fully  
Features  
2.5V to 5.5V Single-Supply Operation  
assembled and tested PCB that evaluates the MAX98357  
I S digital input Class D power amplifier. The DEV board  
Only a Single External Component (VDD Capacitor)  
2
Required in Many Applications  
operates from a single 2.5V to 5.5V DC power supply and  
is capable of delivering 3.2W into a 4Ω load. The device  
outputs can be connected directly to a speaker load for  
filterless applications. However, a filter can be added to  
2
I S, Left-Justified, or TDM Input  
Five Selectable Gains (3db, 6dB, 9dB, 12dB, and  
15dB)  
2
ease evaluation. The MAX98357A accepts standard I S  
Audio Channel Select (Left, Right, and Mono Mix)  
Filterless Operation  
data and the MAX98357B accepts left-justified digital  
audio data. Both versions also support 8-channel TDM  
audio data.  
Optional Class D Output Filters for Ease of  
Evaluation  
The MAX98357 evaluation system (EV system) includes  
the MAX98357 DEV board and Maxim Integrated’s audio  
interface board (MAXAUDINT001# board).  
Proven PCB Layout  
Fully Assembled and Tested  
The MAXAUDINT001# board provides an easy-to-use  
2
USB audio-to-I S converter. This allows for any computer  
Ordering Information appears at end of data sheet.  
to become a digital audio source, which can be used to  
evaluate the devices. The MAXAUDINT001# board can  
also be used to power the MAX98357. This allows for a  
complete evaluation from a single USB connection.  
2.5V TO 5.5V  
10µF  
0.1µF  
VDD  
GAIN_SLOT  
PCM  
MAX98357  
LRCLK  
AUDIO  
BCLK  
DIGITAL  
OUTP  
OUTN  
INTERFACE  
BOARD  
CLASS D  
OUTPUT STAGE  
AUDIO  
INTERFACE  
DAC  
DIN  
SD_MODE  
Figure 1. Simplified Block Diagram  
19-6833; Rev 2; 9/18  

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