MAX7326
I2C Port Expander with
12 Push-Pull Outputs and 4 Inputs
Port and Interrupt INT Timing Characteristics
(V+ = +1.71V to +5.5V, T = -40°C to +125°C, unless otherwise noted. Typical values are at V+ = +3.3V, T = +25°C.) (Note 1)
A
A
PARAMETER
Port Output Data Valid
Port Input Setup Time
Port Input Hold Time
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
µs
t
C ≤ 100pF
4
PPV
L
t
C ≤ 100pF
0
4
µs
PSU
L
t
C ≤ 100pF
µs
PH
L
INT Input Data Valid Time
t
C ≤ 100pF
4
4
µs
IV
IP
L
INT Reset Delay Time from STOP
t
C ≤ 100pF
µs
L
INT Reset Delay Time from
t
C ≤ 100pF
4
µs
IR
L
Acknowledge
Timing Characteristics
(V+ = +1.71V to +5.5V, T = -40°C to +125°C, unless otherwise noted. Typical values are at V+ = +3.3V, T = +25°C.) (Note 1)
A
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX UNITS
Serial Clock Frequency
f
400
kHz
µs
SCL
Bus Free Time Between a STOP
and a START Condition
Hold Time (Repeated) START
Condition
Repeated START Condition
Setup Time
t
1.3
0.6
BUF
t
µs
µs
HD,STA
t
0.6
0.6
SU,STA
STOP Condition Setup Time
Data Hold Time
t
t
µs
µs
ns
µs
µs
SU,STO
(Note 2)
0.9
HD,DAT
Data Setup Time
t
100
1.3
0.7
SU,DAT
SCL Clock Low Period
SCL Clock High Period
t
LOW
t
HIGH
Rise Time of Both SDA and SCL
Signals, Receiving
Fall Time of Both SDA and SCL
Signals, Receiving
20 +
t
(Notes 3, 4)
(Notes 3, 4)
300
300
250
ns
ns
R
0.1C
b
20 +
0.1C
t
F
b
20 +
Fall Time of SDA Transmitting
t
(Notes 3, 4)
(Note 5)
ns
ns
pF
ns
µs
F,TX
0.1C
50
b
Pulse Width of Spike Suppressed
t
SP
Capacitive Load for Each
Bus Line
C
t
(Note 3)
400
b
RST Pulse Width
RST Rising to START Condition
500
1
W
t
RST
Setup Time
Note 1: All parameters are tested at T = +25°C. Specifications over temperature are guaranteed by design.
A
Note 2: A master device must provide a hold time of at least 300ns for the SDA signal (referred to V of the SCL signal) to bridge
IL
the undefined region of SCL’s falling edge.
Note 3: Guaranteed by design.
Note 4: Cb = total capacitance of one bus line in pF. I
≤ 6mA. t and t measured between 0.3 x V+ and 0.7 x V+.
R F
SINK
Note 5: Input filters on the SDA and SCL inputs suppress noise spikes less than 50ns.
Maxim Integrated
│ 3
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