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MAX7326

更新时间: 2023-12-20 18:45:31
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
18页 959K
描述
I2C端口扩展器,提供12路推挽式输出和4路输入

MAX7326 数据手册

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MAX7326  
I2C Port Expander with  
12 Push-Pull Outputs and 4 Inputs  
Table 1. MAX7319–MAX7329 Family Comparison (continued)  
2
I C  
INPUT  
INPUTS INTERRUPT  
MASK  
OPEN-  
DRAIN  
OUTPUTS OUTPUTS  
PUSH-  
PULL  
PART  
SLAVE  
ADDRESS  
CONFIGURATION  
4 I/O, 4 output-only versions:  
4 open-drain I/O ports with latching transition  
detection interrupt and selectable pullups.  
MAX7323  
110xxxx  
Up to 4  
Up to 4  
4
4 push-pull outputs with selectable power-up default  
levels.  
0100xxx  
0111xxx  
MAX7328  
MAX7329  
8 open-drain I/O ports with nonlatching transition  
detection interrupt and pullups on all ports.  
Up to 8  
Up to 8  
When the MAX7326 is read through the serial interface,  
the actual logic levels at the ports are read back.  
RST Input  
The active-low RST input operates as a reset that voids  
2
any I C transaction involving the MAX7326 and forcing  
The four input ports offer latching transition detection  
functionality. All input ports are continuously monitored  
for changes. An input change sets 1 of 4 flag bits that  
identify the changed input(s). All flags are cleared upon a  
subsequent read or write transaction to the MAX7326.  
2
the MAX7326 into the I C STOP condition. The reset  
action does not clear the interrupt output (INT).  
Standby Mode  
When the serial interface is idle, the MAX7326 auto-  
matically enters standby mode, drawing minimal supply  
current.  
A latching interrupt output (INT) is programmed to flag  
input data changes on the four input ports through an  
interrupt mask register. By default, data changes on any  
input port force INT to a logic-low. Interrupt output INT and  
all transition flags are deasserted when the MAX7326 is  
next accessed through the serial interface.  
Slave Address, Power-Up Default  
Logic Levels, and Input Pullup Selection  
Address inputs AD0 and AD2 determine the MAX7326  
slave address and select which inputs have pullup  
resistors. Pullups are enabled on the input ports in  
groups of two (see Table 2).  
Internal pullup resistors to V+ are selected by the address  
select inputs (AD0 and AD2). Pullups are enabled on the  
input ports in groups of two (see Table 2).  
2
The MAX7326 slave address is determined on each I C  
Initial Power-Up  
transmission, regardless of whether the transmission  
is actually addressing the MAX7326. The MAX7326  
distinguishes whether address inputs AD0 and AD2 are  
connected to SDA or SCL instead of fixed logic levels  
V+ or GND during this transmission. This means that the  
MAX7326 slave address can be configured dynamically in  
the application without cycling the device supply.  
On power-up, the transition detection logic is reset, and  
INT is deasserted. The interrupt mask register is set to  
0x3C, enabling the interrupt output for transitions on  
all four input ports. The transition flags are cleared to  
indicate no data changes. The power-up default states  
2
of the 12 push-pull outputs are set according to the I C  
slave address selection inputs, AD0 and AD2 (see Tables  
2 and 3). Pullups are enabled on the input port in groups  
of two (see Table 2).  
On initial power-up, the MAX7326 cannot decode address  
inputs AD0 and AD2 fully until the first I C transmission.  
This is important because the address selection is used to  
determine the power-up logic state (output low or I/O high),  
and whether pullups are enabled. However, at power-up,  
2
Power-On Reset (POR)  
The MAX7326 contains an integral POR circuit that  
ensures all registers are reset to a known state on  
2
the I C SDA and SCL bus interface lines are high imped-  
ance at the pins of every device (master or slave) connect-  
ed to the bus, including the MAX7326. This is guaranteed  
as part of the I C specification. Therefore, when address  
power-up. When V+ rises above V  
POR circuit releases the registers and 2-wire interface  
for normal operation. When V+ drops below V , the  
(1.6V max), the  
POR  
2
POR  
inputs AD0 and AD2 are connected to SDA or SCL during  
power-up, they appear to be connected to V+. The port  
MAX7326 resets all output register contents to the POR  
defaults (Tables 2 and 3).  
Maxim Integrated  
7  
www.maximintegrated.com  

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