Datasheet > MAX7320AEE+T

MAX7320AEE+T

更新时间： 2024-02-13 06:44:42

品牌	Logo	应用领域
美信 - MAXIM		信息通信管理光电二极管外围集成电路
页数	文件大小	规格书
14页	732K
描述
Parallel I/O Port, 8-Bit, 8 I/O, BICMOS, PDSO16, 0.150 INCH, 0.635 MM PITCH, LEAD FREE, MO137AB, QSOP-16

阅读下载

获取价格

技术参数
数据手册

如果您发现信息不准确，欢迎纠错

MAX7320AEE+T 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Active	零件包装代码：	SOIC
包装说明：	SSOP, SSOP16,.25	针数：	16
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	5.35
JESD-30 代码：	R-PDSO-G16	JESD-609代码：	e3
长度：	4.9 mm	位数：	8
I/O 线路数量：	8	端口数量：	1
端子数量：	16	最高工作温度：	125 °C
最低工作温度：	-40 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	SSOP	封装等效代码：	SSOP16,.25
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE, SHRINK PITCH
峰值回流温度（摄氏度）：	NOT SPECIFIED	电源：	1.8/5 V
认证状态：	Not Qualified	座面最大高度：	1.75 mm
子类别：	Parallel IO Port	最大供电电压：	5.5 V
最小供电电压：	1.71 V	标称供电电压：	3.3 V
表面贴装：	YES	技术：	BICMOS
温度等级：	AUTOMOTIVE	端子面层：	Matte Tin (Sn)
端子形式：	GULL WING	端子节距：	0.635 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	3.9 mm	uPs/uCs/外围集成电路类型：	PARALLEL IO PORT, GENERAL PURPOSE
Base Number Matches：	1

MAX7320AEE+T 数据手册

MAX7320

I²C Port Expander with Eight Push-Pull Outputs

Acknowledge

The acknowledge bit is a clocked 9th bit the recipi-

ent uses to acknowledge receipt of each byte of data

(Figure 4). Each byte transferred effectively requires 9

bits. The master generates the ninth clock pulse, and the

recipient pulls down SDA during the acknowledge clock

pulse, such that the SDA line is stable low during the high

period of the clock pulse. When the master is transmitting

to the MAX7320, the device generates the acknowledge

bit because the MAX7320 is the recipient. When the

MAX7320 is transmitting to the master, the master gen-

erates the acknowledge bit because the master is the

recipient.

SDA

SCL

DATA LINE STABLE; CHANGE OF DATA

DATA VALID ALLOWED

Figure 3. Bit Transfer

CLOCK PULSE

START

FOR ACKNOWLEDGMENT

CONDITION

Slave Address

SCL

The MAX7320 has a 7-bit slave address (Figure 5). The

8th bit following the 7-bit slave address is the R/W bit. It is

low for a write command, and high for a read command.

SDA BY

TRANSMITTER

SDA BY

RECEIVER

The 1st (A6), 2nd (A5), and 3rd (A4) bits of the MAX7320

slave address are always 1, 0, and 1. Connect AD0 and

AD2 to GND, V+, SDA, or SCL to select the slave address

bits A3, A2, A1, and A0. The MAX7320 has 16 possible

slave addresses (Table 3), allowing up to 16 MAX7320

Figure 4. Acknowledge

the acknowledge bit. The master can read one or more

bytes from the MAX7320 and then issue a STOP condi-

tion (Figure 6). The MAX7320 transmits the current port

data, read back from the actual port outputs (not the port

output latches) during the acknowledge. If a port is forced

to a logic state other than its programmed state, the read

back reflects this. If driving a capacitive load, readback

port level verification algorithms may need to take the RC

rise/fall time into account.

devices on an I C bus.

Note the MAX7320 offers a different range of I C slave

addresses from the MAX7319, MAX7321, MAX7322 and

MAX7323, for which 1st (A6), 2nd (A5), and 3rd (A4) bits

of the slave address are always 1, 1, and 0.

Accessing the MAX7320

A single-byte read from the MAX7320 returns the status

of the eight output ports, read back as inputs.

Typically, the master reads one byte from the MAX7320,

then issues a STOP condition (Figure 6). However, the

master can read 2 or more bytes from the MAX7320,

then issue a STOP condition. In this case, the MAX7320

resamples the port outputs during each acknowledge and

transmits the new data each time.

A 2-byte read repeatedly returns the status of the eight

output ports, read back as inputs.

A multibyte read (more than 2 bytes before the I C

STOP bit) repeatedly returns the status of the eight output

ports, read back as inputs.

A single-byte write to the MAX7320 sets the logic state

of all eight outputs.

Writing to the MAX7320

A write to the MAX7320 starts with the master transmit-

ting the MAX7320’s slave address with the R/W bit set

low. The MAX7320 acknowledges the slave address and

samples the ports during the acknowledge bit. The master

can transmit one or more bytes of data. The MAX7320

acknowledges each subsequent byte of data and updates

the output ports until the master issues a STOP condition

(Figure 7).

A multibyte write to the MAX7320 repeatedly sets the

logic state of all eight outputs.

Reading from the MAX7320

A read from the MAX7320 starts with the master transmit-

ting the MAX7320’s slave address with the R/W bit set

high. The MAX7320 acknowledges the slave address,

and samples the logic state of the output ports during

Maxim Integrated

│ 9

www.maximintegrated.com

1...6 7 8910 11 12...14

下载PDF

与MAX7320AEE+T相关器件

型号	品牌	描述	获取价格	数据表
MAX7320AEE-T	MAXIM	Parallel I/O Port, 8-Bit, 8 I/O, BICMOS, PDSO16, 0.150 INCH, 0.635 MM PITCH, LEAD FREE, MO	获取价格
MAX7320ATE	MAXIM	Parallel I/O Port, 8-Bit, 8 I/O, BICMOS, TQFN-16	获取价格
MAX7320ATE+	MAXIM	暂无描述	获取价格
MAX7320ATE+T	MAXIM	Parallel I/O Port, 8-Bit, 8 I/O, BICMOS, 3 X 3 MM, 0.8 MM HEIGHT, LEAD FREE, MO220WEED-2,	获取价格
MAX7321	MAXIM	I2C Port Expander with 8 Open-Drain I/Os	获取价格
MAX7321	ADI	I2C端口扩展器，具有8路漏极开路I/O	获取价格

与MAX7320AEE+T相关文章

深入解析CS8416引脚说明、参数、技术特点
2024-06-03

1
TPA3116D2功放芯片参数详解、引脚说明
2024-06-03

2
移位寄存器74HC165引脚说明、驱动程序示例解读
2024-06-03

2
深入解析AD9833：DDS频率合成器的卓越性能与广泛应用
2024-06-03

2

产品中心

服务支持

精选活动

关于我们

帮助中心

MAX7320AEE+T

MAX7320AEE+T 技术参数

MAX7320AEE+T 数据手册

与MAX7320AEE+T相关器件

与MAX7320AEE+T相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

MAX7320AEE+T

MAX7320AEE+T 技术参数

MAX7320AEE+T 数据手册

与MAX7320AEE+T相关器件

与MAX7320AEE+T相关文章

您还可以找

您在本页遇到什么问题？