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MAX7312AWG

更新时间: 2024-02-13 22:52:23
品牌 Logo 应用领域
美信 - MAXIM /
页数 文件大小 规格书
17页 373K
描述
2-Wire-Interfaced 16-Bit I/O Port Expander with Interrupt and Hot-Insertion Protection

MAX7312AWG 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active包装说明:,
Reach Compliance Code:compliantFactory Lead Time:6 weeks
风险等级:5.72峰值回流温度(摄氏度):NOT SPECIFIED
处于峰值回流温度下的最长时间:NOT SPECIFIEDuPs/uCs/外围集成电路类型:PARALLEL IO PORT, GENERAL PURPOSE
Base Number Matches:1

MAX7312AWG 数据手册

 浏览型号MAX7312AWG的Datasheet PDF文件第5页浏览型号MAX7312AWG的Datasheet PDF文件第6页浏览型号MAX7312AWG的Datasheet PDF文件第7页浏览型号MAX7312AWG的Datasheet PDF文件第9页浏览型号MAX7312AWG的Datasheet PDF文件第10页浏览型号MAX7312AWG的Datasheet PDF文件第11页 
2-Wire-Interfaced 16-Bit I/O Port Expander  
with Interrupt and Hot-Insertion Protection  
MAX7312 generates the acknowledge bit since the  
MAX7312 is the recipient. When the MAX7312 is trans-  
mitting to the master, the master generates the  
acknowledge bit.  
Slave address pins AD2, AD1, and AD0 choose 1 of 64  
slave ID addresses (Table 7).  
Data Bus Transaction  
The command byte is the first byte to follow the ±-bit  
device slave address during a write transmission  
(Table 1, Figure 7). The command byte is used to deter-  
mine which of the following registers are written or read.  
Slave Address  
The MAX7312 has a 7-bit-long slave address (Figure 6).  
The ±th bit following the 7-bit slave address is the R/W  
bit. Set this bit low for a write command and high for a  
read command.  
Writing to Port Registers  
Transmit data to the MAX7312 by sending the device  
slave address and setting the LSB to a logic zero. The  
command byte is sent after the address and deter-  
mines which registers receive the data following the  
command byte (Figure 7).  
PROGRAMMABLE  
SDA  
SDA  
A6  
A5  
A4  
A3  
A2  
A1  
A0  
R/W ACK  
MSB  
LSB  
Figure 6. Slave Address  
Table 1. Command Byte Register  
COMMAND BYTE  
ADDRESS (HEX)  
POWER-UP  
PROTOCOL  
FUNCTION  
DEFAULT  
0x00  
0x01  
0x02  
0x03  
0x04  
0x05  
0x06  
0x07  
0x0±  
0xFF  
Input port 1  
Read byte  
XXXX XXXX  
XXXX XXXX  
1111 1111  
1111 1111  
0000 0000  
0000 0000  
1111 1111  
1111 1111  
0000 0001  
Input port 2  
Read byte  
Output port 1  
Read/write byte  
Read/write byte  
Read/write byte  
Read/write byte  
Read/write byte  
Read/write byte  
Read/write byte  
Output port 2  
Port 1 polarity inversion  
Port 2 polarity inversion  
Port 1 configuration  
Port 2 configuration  
Timeout register  
Factory reserved. (Do not write to this register.)  
SCL  
SDA  
1
2
3
4
5
6
7
8
9
COMMAND BYTE  
PORT 1 DATA  
PORT 2 DATA  
S
A
0
0
0
0
0
0
1
0
A
7
6
5
4
3
2
1
0
A
7
6
5
4
3
2
1
0
A
SLAVE ADDRESS  
R/W  
ACKNOWLEDGE  
FROM SLAVE  
ACKNOWLEDGE  
FROM SLAVE  
ACKNOWLEDGE  
FROM SLAVE  
ACKNOWLEDGE  
FROM SLAVE  
START  
CONDITION  
WRITE TO PORT  
DATA OUT PORT 1  
t
PV  
READ FROM PORT 2  
t
PV  
Figure 7. Writes to Output Registers Through Write Byte Protocol  
_______________________________________________________________________________________  
8

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