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MAX7312AWG

更新时间: 2024-01-01 09:27:42
品牌 Logo 应用领域
美信 - MAXIM /
页数 文件大小 规格书
17页 373K
描述
2-Wire-Interfaced 16-Bit I/O Port Expander with Interrupt and Hot-Insertion Protection

MAX7312AWG 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active包装说明:,
Reach Compliance Code:compliantFactory Lead Time:6 weeks
风险等级:5.72峰值回流温度(摄氏度):NOT SPECIFIED
处于峰值回流温度下的最长时间:NOT SPECIFIEDuPs/uCs/外围集成电路类型:PARALLEL IO PORT, GENERAL PURPOSE
Base Number Matches:1

MAX7312AWG 数据手册

 浏览型号MAX7312AWG的Datasheet PDF文件第3页浏览型号MAX7312AWG的Datasheet PDF文件第4页浏览型号MAX7312AWG的Datasheet PDF文件第5页浏览型号MAX7312AWG的Datasheet PDF文件第7页浏览型号MAX7312AWG的Datasheet PDF文件第8页浏览型号MAX7312AWG的Datasheet PDF文件第9页 
2-Wire-Interfaced 16-Bit I/O Port Expander  
with Interrupt and Hot-Insertion Protection  
I/O0  
I/O1  
I/O2  
I/O3  
I/O4  
I/O5  
I/O6  
I/O7  
AD0  
AD1  
AD2  
8 BIT  
INPUT/OUTPUT  
PORT 1  
WRITE PULSE  
READ PULSE  
SMBus  
CONTROL  
SCL  
SDA  
INPUT  
FILTER  
I/O8  
I/O9  
8 BIT  
I/O10  
I/O11  
I/O12  
I/O13  
I/O14  
I/O15  
INPUT/OUTPUT  
PORT 2  
N
WRITE PULSE  
READ PULSE  
V+  
INT  
POWER-ON  
RESET  
MAX7312  
GND  
Figure 1. MAX7312 Block Diagram  
SDA  
t
BUF  
t
t
SU, STA  
SU, DAT  
t
HD, STA  
t
LOW  
t
t
SU, STO  
HD, DAT  
SCL  
t
HIGH  
t
HD, STA  
t
R
t
F
REPEATED START CONDITION  
START CONDITION  
STOP CONDITION START CONDITION  
Figure 2. 2-Wire Serial Interface Timing Diagram  
Detailed Description  
Serial Interface  
The MAX7312 general-purpose input/output (GPIO)  
peripheral provides up to 16 I/O ports, controlled  
Serial Addressing  
The MAX7312 operates as a slave that sends and  
receives data through a 2-wire interface. The interface  
uses a serial data line (SDA) and a serial clock line  
(SCL) to achieve bidirectional communication between  
master(s) and slave(s). A master, typically a microcon-  
troller, initiates all data transfers to and from the  
MAX7312, and generates the SCL clock that synchro-  
nizes the data transfer (Figure 2).  
2
through an I C-compatible serial interface. The  
MAX7312 consists of input port registers, output port  
registers, polarity inversion registers, configuration reg-  
isters, and a bus-timeout register. Upon power-on, all  
I/O lines are set as inputs. Three slave ID address select  
pins, AD0, AD1, and AD2, choose one of 64 slave ID  
addresses, including the eight addresses supported by  
the Phillips PCA9555. Table 1 is the register address  
table. Tables 26 show detailed register information.  
6
_______________________________________________________________________________________  

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