MAX7310AUE-T

更新时间： 2024-02-29 11:34:04

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美信 - MAXIM		/
页数	文件大小	规格书
15页	313K
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数据手册

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MAX7310AUE-T 数据手册

2-Wire-Interfaced 8-Bit I/O Port Expander

with Reset

Pin Description

TSSOP/

QSOP

THIN

NAME

FUNCTION

QFN

SCL

SDA

Serial Clock Line

Serial Data Line

AD0

Address Input 0

AD1

Address Input 1

AD2

Address Input 2

I/O0

Input/Output Port 0 (Open Drain)

Input/Output Port 1

Supply Ground

I/O1

GND

I/O2–I/O7

9–14

7–12

Input/Output Port 2—Input/Output Port 7

External Reset (Active Low). Pull RESET low to configure I/O pins as inputs. Set RESET

high for normal operation.

—

RESET

V+

Supply Voltage. Bypass with a 0.047µF capacitor to GND.

Exposed Pad on Package Underside. Connect to GND.

Exposed

pad

PAD

AD0

AD1

AD2

MAX7310

I/O0

I/O1

SCL

SDA

INPUT/

OUTPUT

PORTS

I/O2

I/O3

I/O4

I/O5

I/O6

I/O7

SMBus

CONTROL

8 BIT

INPUT

FILTER

WRITE PULSE

READ PULSE

V+

POWER-ON

RESET

GND

Figure 1. MAX7310 Block Diagram

port register, a polarity inversion register, a configura-

tion register, and a bus timeout register. An active-low

reset input sets the eight I/O lines as inputs. Three

slave ID address select pins (AD0, AD1, and AD2)

choose one of 56 slave ID addresses (Figure 1).

Detailed Description

The MAX7310 general-purpose input/output (GPIO)

peripheral provides up to eight I/O ports, controlled

through an I²C-compatible serial interface. The

MAX7310 consists of an input port register, an output

_______________________________________________________________________________________________________

1 2 3 456 7 8...15

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