MAX7310AUE-T

更新时间： 2024-02-21 14:56:47

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MAX7310AUE-T 数据手册

2-Wire-Interfaced 8-Bit I/O Port Expander

with Reset

SDA

SCL

DATA LINE STABLE; DATA VALID CHANGE OF DATA ALLOWED

Figure 4. Bit Transfer

START CONDITION

CLOCK PULSE FOR ACKNOWLEDGMENT

SCL

SDA

BY TRANSMITTER

SDA

BY RECEIVER

Figure 5. Acknowledge

FIXED

PROGRAMMABLE

R/W

ACK

SDA

MSB

LSB

SCL

Figure 6. Slave Address

The first bits (MSBs) of the MAX7310 slave address are

always zero. Slave address bits AD2, AD1, and AD0

choose 1 of 56 slave ID addresses (Table 7).

ister address byte acts as a pointer to determine which

The input port register is a read-only port. It reflects the

incoming logic levels of the I/O ports, regardless of

whether the pin is defined as an input or an output by

the configuration register. Writes to the input port regis-

ter are ignored.

Registers

The register address byte is the first byte to follow the

address byte during a read/write transmission. The reg-

_______________________________________________________________________________________

1...4 5 678 9 10...15

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型号	品牌	描述	获取价格	数据表
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