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MAX7036GTP/V+TW PDF预览

MAX7036GTP/V+TW

更新时间: 2024-01-07 21:05:40
品牌 Logo 应用领域
美信 - MAXIM 电信电信集成电路
页数 文件大小 规格书
13页 168K
描述
Telecom Circuit, 1-Func, CMOS, 5 X 5 MM, ROHS COMPLIANT, TQFN-20

MAX7036GTP/V+TW 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active包装说明:HVQCCN,
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.62JESD-30 代码:S-XQCC-N20
长度:5 mm湿度敏感等级:1
功能数量:1端子数量:20
最高工作温度:105 °C最低工作温度:-40 °C
封装主体材料:UNSPECIFIED封装代码:HVQCCN
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):NOT SPECIFIED筛选级别:AEC-Q100
座面最大高度:0.8 mm标称供电电压:3.3 V
表面贴装:YES技术:CMOS
电信集成电路类型:TELECOM CIRCUIT温度等级:INDUSTRIAL
端子形式:NO LEAD端子节距:0.65 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:5 mmBase Number Matches:1

MAX7036GTP/V+TW 数据手册

 浏览型号MAX7036GTP/V+TW的Datasheet PDF文件第6页浏览型号MAX7036GTP/V+TW的Datasheet PDF文件第7页浏览型号MAX7036GTP/V+TW的Datasheet PDF文件第8页浏览型号MAX7036GTP/V+TW的Datasheet PDF文件第10页浏览型号MAX7036GTP/V+TW的Datasheet PDF文件第11页浏览型号MAX7036GTP/V+TW的Datasheet PDF文件第12页 
300MHz to 450MHz ASK Receiver  
with Internal IF Filter  
MAX7036  
an error in the reference frequency. A crystal designed  
Because the stray shunt capacitance at each of the  
pins (IFC1 and IFC2) on a typical PCB is approximately  
2pF, choose the value of the external capacitors to be  
approximately 2pF lower than the desired total capaci-  
tance. Therefore, the practical values for C9 and C10  
are 22pF and 10pF, respectively.  
to operate at a higher load capacitance than the value  
specified for the oscillator is always pulled higher in fre-  
quency. Adding capacitance to increase the load  
capacitance on the crystal increases the start-up time  
and may prevent oscillation altogether.  
In actuality, the oscillator pulls every crystal. The crys-  
tal’s natural frequency is really below its specified fre-  
quency, but when loaded with the specified load  
capacitance, the crystal is pulled and oscillates at its  
specified frequency. This pulling is already accounted  
for in the specification of the load capacitance.  
MAX7036  
22kΩ  
22kΩ  
Additional pulling can be calculated if the electrical  
parameters of the crystal are known. The frequency  
pulling is given by:  
10  
9
11  
IFC1  
IFC2  
IFC3  
C10  
C9  
C
1
+ C  
1
6
M
f =  
×10  
P
2
C
C
+ C  
SPEC  
CASE  
LOAD  
CASE  
where:  
f is the amount the crystal frequency is pulled in  
p
ppm.  
Figure 1. Sallen-Key Lowpass IF Filter  
C
C
C
C
is the motional capacitance of the crystal.  
M
Data Filter  
is the case capacitance.  
CASE  
SPEC  
LOAD  
The data filter is implemented as a 2nd-order lowpass  
Sallen-Key filter. The pole locations are set by the combi-  
nation of two on-chip resistors and two external capaci-  
tors. Adjusting the value of the external capacitors  
changes the corner frequency to optimize for different  
data rates. Set the corner frequency to approximately  
1.5 times the fastest Manchester expected data rate  
from the transmitter. Keeping the corner frequency near  
the data rate rejects any noise at higher frequencies,  
resulting in an increase in receiver sensitivity.  
is the specified load capacitance.  
is the actual load capacitance.  
When the crystal is loaded, as specified (i.e., C  
=
LOAD  
C
), the frequency pulling equals zero.  
SPEC  
It is possible to use an external reference oscillator in  
place of a crystal to drive the VCO. AC-couple the exter-  
nal oscillator to XTAL1 with a 1000pF capacitor. Drive  
XTAL1 with a signal level of approximately -10dBm. AC-  
couple XTAL2 to ground with a 1000pF capacitor.  
The configuration shown in Figure 2 can create a  
Butterworth or Bessel response. The Butterworth filter  
offers a very flat amplitude response in the passband  
and a rolloff rate of 40dB/decade for the two-pole filter.  
The Bessel filter has a linear phase response, which  
works with the coefficients in Table 1.  
IF Filter  
The IF filter is a 2nd-order Butterworth lowpass filter  
preceded by a low-frequency DC block. The lowpass  
filter is implemented as a Sallen-Key filter using an  
internal op amp and two on-chip 22kΩ resistors. The  
pole locations are set by the combination of the on-chip  
resistors and two external capacitors (C9 and C10,  
Figure 1). The values of these two capacitors for a 3dB  
cutoff frequency of 400kHz are given below:  
b
C5 =  
a 100k π f  
(
)( )  
(
)
c
1
1
a
C9 =  
=
= 26pF  
C6 =  
1.414 22kΩ 3.14 400kHz  
1.414 R  
π
f
(
)(  
)(  
)(  
)
(
)( )( )  
(
)
c
4 100k π f  
(
)( )  
(
)
c
1
1
C10 =  
=
= 13pF  
2.828 22kΩ 3.14 400kHz  
)( )( )(  
2.828 R  
π
f
(
)
(
)( )( )  
(
)
c
where f is the desired corner frequency.  
C
_______________________________________________________________________________________  
9

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