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MAX7036GTP/V+TW PDF预览

MAX7036GTP/V+TW

更新时间: 2024-02-09 16:54:52
品牌 Logo 应用领域
美信 - MAXIM 电信电信集成电路
页数 文件大小 规格书
13页 168K
描述
Telecom Circuit, 1-Func, CMOS, 5 X 5 MM, ROHS COMPLIANT, TQFN-20

MAX7036GTP/V+TW 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active包装说明:HVQCCN,
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.62JESD-30 代码:S-XQCC-N20
长度:5 mm湿度敏感等级:1
功能数量:1端子数量:20
最高工作温度:105 °C最低工作温度:-40 °C
封装主体材料:UNSPECIFIED封装代码:HVQCCN
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):NOT SPECIFIED筛选级别:AEC-Q100
座面最大高度:0.8 mm标称供电电压:3.3 V
表面贴装:YES技术:CMOS
电信集成电路类型:TELECOM CIRCUIT温度等级:INDUSTRIAL
端子形式:NO LEAD端子节距:0.65 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:5 mmBase Number Matches:1

MAX7036GTP/V+TW 数据手册

 浏览型号MAX7036GTP/V+TW的Datasheet PDF文件第7页浏览型号MAX7036GTP/V+TW的Datasheet PDF文件第8页浏览型号MAX7036GTP/V+TW的Datasheet PDF文件第9页浏览型号MAX7036GTP/V+TW的Datasheet PDF文件第11页浏览型号MAX7036GTP/V+TW的Datasheet PDF文件第12页浏览型号MAX7036GTP/V+TW的Datasheet PDF文件第13页 
300MHz to 450MHz ASK Receiver  
with Internal IF Filter  
For example, to choose a Butterworth filter response  
with a corner frequency of 6kHz:  
The suggested data-slicer configuration uses a resistor  
(R1) connected between DSN and DSP with a capaci-  
tor (C4) from DSN to GND (Figure 3). This configuration  
averages the analog output of the filter and sets the  
threshold to approximately 50% of that amplitude. With  
this configuration, the threshold automatically adjusts  
as the analog signal varies, minimizing the possibility  
for errors in the digital data. The values of R1 and C4  
affect how fast the threshold tracks to the analog ampli-  
tude. Be sure to keep the corner frequency of the RC  
circuit much lower than the lowest expected data rate.  
1.000  
C5 =  
= 375pF  
1.414 100kΩ 3.14 6kHz  
(
)(  
)(  
)(  
)
1.414  
C6 =  
= 186pF  
4 100kΩ 3.14 6kHz  
( )( )( )(  
)
MAX7036  
Choosing standard capacitor values changes C5 to  
390pF and C6 to 180pF, as shown in the Typical  
Application Circuit.  
Table 1. Coefficients to Calculate C5  
and C6  
MAX7036  
FILTER TYPE  
Butterworth (Q = 0.707)  
Bessel (Q = 0.577)  
a
b
DATA  
FILTER  
1.414  
1.3617  
1.000  
0.618  
DATA  
SLICER  
20  
17  
16  
DSN  
DSP  
R1  
DATAOUT  
C4  
MAX7036  
RSSI  
R
DF2  
R
DF1  
100kΩ  
100kΩ  
Figure 3. Generating Data-Slicer Threshold  
Note that a long string of zeros or ones can cause the  
threshold to drift. This configuration works best if a  
coding scheme (e.g., Manchester coding, which has an  
equal number of zeros and ones) is used.  
16  
DSP  
14  
OPP  
15  
DFFB  
C6  
C5  
Peak Detector  
The peak-detector output (PDOUT), in conjunction with  
an external RC filter, creates a DC output voltage equal  
to the peak value of the data signal. The resistor pro-  
vides a path for the capacitor to discharge, allowing the  
peak detector to dynamically follow peak changes of  
the data-filter output voltage. The peak detector can be  
used for at least two functions. First, it can serve as an  
RSSI for ASK modulation. Second, it can be used for  
faster data-slicer response by adding it to the threshold  
pin (DSN) on the data-slicer comparator (Figure 4). The  
two capacitors in this circuit should be equal, and the  
peak detector resistor should be approximately 10  
Figure 2. Sallen-Key Lowpass Data Filter  
Data Slicer  
The data slicer takes the analog output of the data filter  
and converts it to a digital signal. This is achieved by  
using a comparator and comparing the analog input to  
a threshold voltage. One input is supplied by the data-  
filter output. Both comparator inputs are accessible off  
chip to allow for different methods of generating the  
slicing threshold, which is applied to the second com-  
parator input.  
10 ______________________________________________________________________________________  

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