Datasheet > MAX6454UT46S+T

MAX6454UT46S+T

更新时间： 2023-08-15 00:00:00

品牌	Logo	应用领域
美信 - MAXIM		信息通信管理光电二极管
页数	文件大小	规格书
11页	1107K
描述
Power Supply Support Circuit, Adjustable, 1 Channel, +4.63VV, BICMOS, PDSO6, LEAD FREE, SOT-23, 6 PIN

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MAX6454UT46S+T 数据手册

MAX6453–MAX6456

µP Supervisors with Separate V

Reset and

Manual Reset Outputs

Manual Reset

The MAX6453/MAX6454 contain a manual reset output

(MROUT) that asserts low immediately after driving MR

low and remains low for the reset timeout period after

MR goes high (Figure 1). The pushbutton manual reset

has no effect on the RESET output. MROUT output can

be used to drive an NMI (nonmaskable interrupt) on the

processor to save valuable data.

210ms

MROUT

Figure 1. MAX6453/MAX6454 Timing Diagram

The MAX6455/MAX6456’s MROUT is asserted imme-

diately upon driving MR low. Driving MR low for longer

than the extended (typ) setup timeout period asserts

RESET. When MR is deasserted, MROUT and RESET

remain asserted low for the reset timeout period after

MR goes high (Figure 2).

Detailed Description

Reset Output

The reset output is typically connected to the reset input of

a microprocessor (µP). A µP’s reset input starts or restarts

the µP in a known state. The MAX6453–MAX6456 µP

supervisory circuits provide the reset logic to prevent

code-execution errors during power-up, power-down and

brownout conditions (see the Typical Operating Circuit).

Adjustable Input Voltage (RSTIN)

The MAX6453–MAX6456 monitor the voltage on RSTIN

using an adjustable reset threshold set with an external

resistor voltage divider (Figure 3). Use the following

formula to calculate the externally monitored voltage

RESET changes from high to low whenever the moni-

tored voltage (RSTIN or V ) drops below the reset

MON-TH

threshold voltages. When VRSTIN and V

exceed their

respective reset threshold voltages, RESET remains low

for the reset timeout period, and then goes high. RESET

changes from high to low after MR input is held low for the

extended (typ) setup timeout period and deasserts 140ms

(min) after MR deasserts.

= V

× (R1 +R2)/R2

MON-TH

TH-RSTIN

where V

and V

is the desired reset threshold voltage

is the reset input threshold (0.63V).

MON_TH

TH-RSTIN

Resistors R1 and R2 can have very high values to mini-

mize current consumption due to low leakage currents.

Set R2 to some conveniently high value (250kW, for

example) and calculate R1 based on the desired reset

threshold voltage, using the following formula:

RESET is guaranteed to be in the proper output logic

state for V

inputs ≥ 1V. For applications requiring valid

reset logic when V

is less than 1V, see the Ensuring a

Valid RESET Output Down to V

= 0V section.

R1 = R2 5 (V

MON_TH/VTH - 1

LONG SETUP PERIOD

210ms

MROUT

RESET

Figure 2. MAX6455/MAX6456 Timing Diagram

Maxim Integrated

│ 6

www.maximintegrated.com

1...3 4 567 8 9...11

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