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MAX32650–MAX32652
Ultra-Low-Power Arm Cortex-M4 Processor
with FPU-Based Microcontroller (MCU) with
3MB Flash and 1MB SRAM
General Description
Benefits and Features
DARWIN is a new breed of low-power microcontrollers
built to thrive in the rapidly evolving Internet of Things
(IoT). They are smart, with the biggest memories in their
class and a massively scalable memory architecture. They
run forever, thanks to wearable-grade power technology.
They are also tough enough to withstand the most ad-
vanced cyberattacks. DARWIN microcontrollers are de-
signed to run any application you can imagine—in places
where you wouldn’t dream of sending other microcon-
trollers.
● Ultra-Efficient Microcontroller for Battery-Powered
Applications
• 120MHz Arm Cortex-M4 Processor with FPU
• SmartDMA Provides Background Memory
Transfers with Programmable Data Processing
• 120MHz High-Speed and 50MHz Low-Power
Oscillators
• 7.3728MHz Low-Power Oscillators
• 32.768kHz and RTC Clock (Requires External
Crystal)
• 8kHz, Always-On, Ultra-Low-Power Oscillator
• 3MB Internal Flash, 1MB Internal SRAM
• 104μW/MHz Executing from Cache at 1.1V
• Five Low-Power Modes: Active, Sleep, Background,
Deep Sleep, and Backup
Generation UP microcontrollers are designed to handle
the increasingly complex applications demanded by to-
day’s advanced battery-powered devices and wireless
sensors. The MAX32650–MAX32652 are ultra-low-power
memory-scalable microcontrollers designed specifically
for high-performance, battery-powered applications. They
are based on an Arm Cortex -M4 with FPU CPU with
3MB flash and 1MB SRAM. Memory scalability is support-
ed with multiple memory-expansion interfaces, including a
HyperBus™/Xccela™ DDR interface and two SPI execute
in place (SPIx) interfaces. A secure digital interface sup-
ports external high-speed memory cards, including SD,
SDIO, MMC, SDHC, and microSD™.
• 1.8V and 3.3V I/O with No Level Translators
®
®
● Scalable Cached External Memory Interfaces:
• 120MB/s HyperBus/Xccela DDR Interface
• SPIXF/SPIXR for External Flash/RAM Expansion
• 240Mbps SDHC/eMMC/SDIO/microSD Interface
● Optimal Peripheral Mix Provides Platform Scalability
• 16-Channel DMA
• Three SPI Master (60MHz)/Slave (48MHz)
• One QuadSPI Master (60MHz)/Slave (48MHz)
• Up to Three 4Mbaud UARTs with Flow Control
Power-management features provide five low-power
modes for clock, peripheral, and voltage control. Individual
SRAM banks of 32KB, 96KB, or 1024KB (full retention)
can be retained with reduced power consumption. A
SmartDMA performs complex background processing
while the CPU is off to dramatically reduce overall power
consumption.
2
• Two 1MHz I C Master/Slave
2
• I S Slave
• Four-Channel, 7.8ksps, 10-Bit Delta-Sigma ADC
• USB 2.0 Hi-Speed Device Interface with PHY
• 16 Pulse Train Generators
• Six 32-Bit Timers with 8mA High Drive
• 1-Wire Master
The MAX32651 is a secure version with a trust protection
unit (TPU) which provides a modular arithmetic accel-
erator (MAA) for fast ECDSA, an AES engine, TRNG,
SHA-256 hash, and secure bootloader. A memory decryp-
tion integrity unit (MDIU) provides on-the-fly data decryp-
tion (plain or executable) stored in external flash.
®
● Trust Protection Unit (TPU) for IP/Data Security
• Modular Arithmetic Accelerator (MAA), True
Random Number Generator (TRNG)
• Secure Nonvolatile Key Storage, SHA-256,
AES-128/192/256
The MAX32652 is packaged in a high-density, 0.35mm
pitch, 140-bump WLP targeted for tiny form factor prod-
ucts that require high I/O counts.
• Memory Decryption Integrity Unit, Secure Boot
ROM
Ordering Information appears at end of data sheet.
Applications
● Sports Watches, Fitness Monitors
● Wearable Medical Patches, Portable Medical Devices
● Industrial Sensors, IoT
19-100220; Rev 7; 10/20
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