Datasheet > MAX12559ETK+TD

MAX12559ETK+TD

更新时间： 2024-11-24 20:46:35

品牌	Logo	应用领域
美信 - MAXIM		转换器
页数	文件大小	规格书
30页	401K
描述
ADC, Proprietary Method, 14-Bit, 2 Func, 1 Channel, Parallel, Word Access, CMOS, 10 X 10 MM, 0.80 MM HEIGHT, LEAD FREE, MO-220WNND-2, TQFN-68

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MAX12559ETK+TD 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Obsolete	零件包装代码：	QFN
包装说明：	10 X 10 MM, 0.80 MM HEIGHT, LEAD FREE, MO-220WNND-2, TQFN-68	针数：	68
Reach Compliance Code：	compliant	ECCN代码：	3A991.C.3
HTS代码：	8542.39.00.01	风险等级：	5.82
最大模拟输入电压：	1.024 V	最小模拟输入电压：	-1.024 V
转换器类型：	ADC, PROPRIETARY METHOD	JESD-30 代码：	S-XQCC-N68
JESD-609代码：	e3	长度：	10 mm
湿度敏感等级：	3	模拟输入通道数量：	1
位数：	14	功能数量：	2
端子数量：	68	最高工作温度：	85 °C
最低工作温度：	-40 °C	输出位码：	2'S COMPLEMENT BINARY
输出格式：	PARALLEL, WORD	封装主体材料：	UNSPECIFIED
封装代码：	HVQCCN	封装等效代码：	LCC68,.4SQ,20
封装形状：	SQUARE	封装形式：	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度（摄氏度）：	260	电源：	3.3 V
认证状态：	Not Qualified	采样速率：	96 MHz
采样并保持/跟踪并保持：	TRACK	座面最大高度：	0.8 mm
子类别：	Analog to Digital Converters	标称供电电压：	3.3 V
表面贴装：	YES	技术：	CMOS
温度等级：	INDUSTRIAL	端子面层：	Matte Tin (Sn)
端子形式：	NO LEAD	端子节距：	0.5 mm
端子位置：	QUAD	处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	10 mm	Base Number Matches：	1

MAX12559ETK+TD 数据手册

19-3925; Rev 1; 4/07

Dual, 96Msps, 14-Bit, IF/Baseband ADC

General Description

Features

The MAX12559 is a dual, 3.3V, 14-bit analog-to-digital

converter (ADC) featuring fully differential wideband

track-and-hold (T/H) inputs, driving internal quantizers.

The MAX12559 is optimized for low power, small size,

and high dynamic performance in intermediate frequen-

cy (IF) and baseband sampling applications. This dual

ADC operates from a single 3.3V supply, consuming

only 980mW while delivering a typical 72.2dB signal-to-

noise ratio (SNR) performance at a 175MHz input fre-

quency. The T/H input stages accept single-ended or

differential inputs up to 350MHz. In addition to low oper-

ating power, the MAX12559 features a 0.5mW power-

down mode to conserve power during idle periods.

♦ Direct IF Sampling Up to 350MHz

♦ Excellent Dynamic Performance

73dB/72.2dB SNR at f = 70MHz/175MHz

83.5dBc/78.8dBc SFDR at f = 70MHz/175MHz

♦ 3.3V Low-Power Operation

980mW (Differential Clock Mode)

952mW (Single-Ended Clock Mode)

♦ Fully Differential or Single-Ended Analog Input

♦ Adjustable Differential Analog Input Voltage

♦ 750MHz Input Bandwidth

♦ Adjustable, Internal or External, Shared Reference

♦ Differential or Single-Ended Clock

♦ Accepts 25% to 75% Clock Duty Cycle

♦ User-Selectable DIV2 and DIV4 Clock Modes

♦ Power-Down Mode

A flexible reference structure allows the MAX12559 to

use the internal 2.048V bandgap reference or accept

an externally applied reference and allows the refer-

ence to be shared between the two ADCs. The refer-

ence structure allows the full-scale analog input range

to be adjusted from 0.35V to 1.15V. The MAX12559

provides a common-mode reference to simplify design

and reduce external component count in differential

analog input circuits.

♦ CMOS Outputs in Two’s Complement or Gray

Code

♦ Out-of-Range and Data-Valid Indicators

♦ Small, 68-Pin Thin QFN Package

(10mm x 10mm x 0.8mm)

♦ 12-Bit, Pin-Compatible Version Available

The MAX12559 supports either a single-ended or differ-

ential input clock. User-selectable divide-by-two (DIV2)

and divide-by-four (DIV4) modes allow for design flexibil-

ity and help to reduce the negative effects of clock jitter.

Wide variations in the clock duty cycle are compensated

with the ADC’s internal duty-cycle equalizer (DCE).

(MAX12529)

♦ Evaluation Kit Available (Order MAX12559EVKIT)

Ordering Information

PKG

CODE

The MAX12559 features two parallel, 14-bit-wide,

CMOS-compatible outputs. The digital output format is

pin-selectable to be either two’s complement or Gray

code. A separate power-supply input for the digital out-

puts accepts a 1.7V to 3.6V voltage for flexible interfac-

ing with various logic levels. The MAX12559 is available

in a 10mm x 10mm x 0.8mm, 68-pin thin QFN package

with exposed paddle (EP), and is specified for the

extended (-40°C to +85°C) temperature range.

PART

TEMP RANGE PIN-PACKAGE

MAX12559ETK-D -40°C to +85°C 68 Thin QFN-EP* T6800-4

MAX12559ETK+D -40°C to +85°C 68 Thin QFN-EP* T6800-4

*EP = Exposed paddle.

+Denotes lead-free package.

D = Dry pack.

Selector Guide

For a 12-bit, pin-compatible version of this ADC, refer to

the MAX12529 data sheet. See the Selector Guide for

more selections.

SAMPLING RATE

(Msps)

RESOLUTION

(Bits)

PART

MAX12559

Applications

IF and Baseband Communication Receivers

Cellular, LMDS, Point-to-Point Microwave,

MMDS, HFC, WLAN

MAX12558

MAX12557

MAX12529

MAX12528

MAX12527

I/Q Receivers

Medical Imaging

Portable Instrumentation

Digital Set-Top Boxes

Low-Power Data Acquisition

Pin Configuration appears at end of data sheet.

________________________________________________________________ Maxim Integrated Products

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,

or visit Maxim’s website at www.maxim-ic.com.

12 3 4 5 6 7...30

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MAX12559ETK+TD 替代型号

型号	品牌	替代类型	描述	数据表
MAX12559ETK+D	MAXIM	完全替代	Dual, 96Msps, 14-Bit, IF/Baseband ADC

与MAX12559ETK+TD相关器件

型号	品牌	获取价格	描述	数据表
MAX12559ETK-D	MAXIM	获取价格	Dual, 96Msps, 14-Bit, IF/Baseband ADC
MAX12559EVKIT	MAXIM	获取价格	Dual, 96Msps, 14-Bit, IF/Baseband ADC
MAX1257	MAXIM	获取价格	12-Bit, Multichannel ADCs/DACs with FIFO,Temperature Sensing, and GPIO Ports
MAX1257	ADI	获取价格	12位、多通道ADC/DAC，带有FIFO、温度传感器和GPIO端口
MAX1257BETM	MAXIM	获取价格	12-Bit, Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports
MAX1257BETM+	MAXIM	获取价格	12-Bit, Multichannel ADCs/DACs with FIFO,Temperature Sensing, and GPIO Ports
MAX1257BETM+T	MAXIM	获取价格	暂无描述
MAX1258	MAXIM	获取价格	12-Bit, Multichannel ADCs/DACs with FIFO,Temperature Sensing, and GPIO Ports
MAX1258	ADI	获取价格	12位、多通道ADC/DAC，带有FIFO、温度传感器和GPIO端口
MAX1258BETM	MAXIM	获取价格	12-Bit, Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports

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