MAC7100PB
Rev. 2, 09/2004
Freescale Semiconductor
Product Brief
MAC7100 Microcontroller Family
Product Brief
32-bit Embedded Controller Division
Table of Contents
MAC7100 microcontrollers (MCUs) are members of a
1
Block Diagram.........................................................3
Features..................................................................4
Modes of Operation ................................................8
Chip Configuration Modes...................................8
Low-Power Modes...............................................9
Functional Overview ...............................................9
32-bit ARM7TDMI-S RISC Core..........................9
Enhanced Direct Memory Access (eDMA) and
Channel Multiplexer (DMA MUX) ......................10
External Interface Module (EIM)........................10
Common Flash Module (CFM)..........................10
Interrupt Controller (INTC).................................10
Port Integration Module (PIM) ...........................11
Analog-to-Digital Converters (ATD)...................11
CAN 2.0 Software Compatible (FlexCAN)
pin-compatible family of 32-bit Flash-memory-based
devices developed specifically for embedded automotive
applications. The pin-compatible family concept enables
users to select between different memory and peripheral
options for scalable designs. All MAC7100 devices are
composed of an ARM7TDMI-S™ 32-bit central
processing unit, up to 1 Mbyte of high performance
embedded Flash memory for program storage, an
optional 32 Kbytes of embedded Flash for data and/or
program storage, and up to 48 Kbytes of RAM.
2
3
3.1
3.2
4
4.1
4.2
4.3
4.4
4.5
4.6
4.7
4.8
As shown in Table 1 and Figure 1, the MAC7100 family
is implemented with a variety of on-chip peripherals. An
enhanced DMA (eDMA) controller executes in parallel
with the CPU to improve the performance of data
transfers between memory and many of the peripherals.
DMA transfers may be triggered by various peripheral
events, such as data frame transmission or reception,
elapsed timer periods, and analog-to-data conversion
completions. The peripheral set includes enhanced
asynchronous serial communications interfaces (eSCI)
with Local Interconnect Network (LIN) support
Modules.............................................................12
Enhanced Modular I/O Subsystem (eMIOS).....12
4.9
4.10 Serial Peripheral Interfaces (DSPI) ...................12
4.11 Enhanced Serial Communications Interfaces
(eSCI)................................................................13
4.12 Inter-Integrated Circuit (I2C) Bus Module ..........13
4.13 Periodic Interrupt Timer (PIT) Module ...............13
4.14 Miscellaneous Control Module (MCM) and
Cross-Bar Switch (XBS)....................................13
4.15 System Services Module (SSM)........................14
4.16 Voltage Regulator Module (VREG)....................14
4.17 System Clocks (OSC and CRG)......14
4.18 Development Support......................15
hardware to reduce interrupt overhead, serial peripheral
interfaces (DSPI) with flexible chip selects and fast baud
5
Documentation and Ordering..............15
This document contains information on a new product. Specifications and information herein
are subject to change without notice.
© Freescale Semiconductor, Inc., 2004. All rights reserved.
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