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M74HC155C1R PDF预览

M74HC155C1R

更新时间： 2024-11-26 22:34:39
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 解码器
页数 文件大小 规格书
11页 246K
描述
DUAL 2 TO 4 LINE DECODER 3 TO 8 LINE DECODER

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中文翻译

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M74HC155C1R 技术参数

是否Rohs认证： 符合生命周期：Obsolete
零件包装代码：QFN包装说明：CC-20
针数：20Reach Compliance Code：compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.84其他特性：USABLE AS 1 TO 8 DEMULTIPLEXER; FUNCTION 2 OUTPUT INVERTED
系列：HC/UHJESD-30 代码：S-PQCC-J20
JESD-609代码：e3长度：8.9662 mm
负载电容（CL）：50 pF逻辑集成电路类型：OTHER DECODER/DRIVER
最大I（ol）：0.004 A功能数量：2
端子数量：20最高工作温度：85 °C
最低工作温度：-40 °C输出极性：TRUE
封装主体材料：PLASTIC/EPOXY封装代码：QCCJ
封装等效代码：LDCC20,.4SQ封装形状：SQUARE
封装形式：CHIP CARRIER峰值回流温度（摄氏度）：NOT SPECIFIED
电源：2/6 VProp。Delay @ Nom-Sup：33 ns
传播延迟（tpd）：33 ns认证状态：Not Qualified
座面最大高度：4.57 mm子类别：Decoder/Drivers
最大供电电压 (Vsup)：6 V最小供电电压 (Vsup)：2 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Matte Tin (Sn)端子形式：J BEND
端子节距：1.27 mm端子位置：QUAD
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：8.9662 mm
Base Number Matches：1

M74HC155C1R 数据手册

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M54HC155  
M74HC155  
DUAL 2 TO 4 LINE DECODER 3 TO 8 LINE DECODER  
.
.
.
.
.
.
.
.
HIGH SPEED  
tPD = 12 ns (TYP.) AT VCC = 5 V  
LOW POWER DISSIPATION  
ICC = 4 µA (MAX.) AT TA = 25 °C  
HIGH NOISE IMMUNITY  
VNIH = VNIL = 28 % VCC (MIN.)  
OUTPUT DRIVE CAPABILITY  
10 LSTTL LOADS  
SYMMETRICAL OUTPUT IMPEDANCE  
IOH = IOL = 4 mA (MIN.)  
BALANCED PROPAGATION DELAYS  
tPLH = tPHL  
WIDE OPERATING VOLTAGE RANGE  
B1R  
(Plastic Package)  
F1R  
(Ceramic Package)  
M1R  
(Micro Package)  
C1R  
(Chip Carrier)  
VCC (OPR) = 2 V TO 6 V  
PIN AND FUNCTION COMPATIBLE  
WITH 54/74LS155  
ORDER CODES :  
M54HC155F1R  
M74HC155B1R  
M74HC155M1R  
M74HC155C1R  
PIN CONNECTIONS (top view)  
DESCRIPTION  
The M54/74HC155 is a high speed CMOS DUAL 2-  
TO-4 LINE DECODER fabricated in silicon gate  
C2MOS technology.  
It has the same high speed performance of LSTTL  
combined with true CMOS low power consumption.  
It features dual 1-TO-4 line demultiplexers with indi-  
vidual strobe inputs (1G and 2G), individual data in-  
puts (1C and 2C) and common binary address  
inputs (A and B).  
When both decoders areenabled bythestrobes, the  
inverted output of 1C data and non-inverted output  
of 2C data will be brought to the select output pins  
of each sections. A 1-TO-8 line demultiplexer can  
also be easily built up by providing a data signal to  
both 1C and 2C inputs ; the output order from the  
msb is 1Y3, 1Y2, 1Y1, 1Y0, 2Y3, 2Y2, 2Y1, 2Y0.  
This device can be used as a 2-to-4 line decoder or  
a 3-to-8 line decoder when 1C is held high and 2C  
is held low.  
NC =  
No Internal  
Connection  
All inputs are equipped with protection circuits  
against static discharge and transient excess volt-  
age.  
December 1992  
1/11  
1234567...11

中文翻译

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