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M6MGB331S8AKT PDF预览

M6MGB331S8AKT

更新时间: 2024-01-22 07:12:25
品牌 Logo 应用领域
瑞萨 - RENESAS /
页数 文件大小 规格书
3页 127K
描述
33,554,432-BIT (2,097,152 - WORD BY 16-BIT /4,194,304-WORD BY 8-BIT) CMOS FLASH MEMORY & 8,388,608-BIT (524,288-WORD BY 16-BIT /1,048,576-WORD BY 8-BI

M6MGB331S8AKT 技术参数

生命周期:Obsolete包装说明:,
Reach Compliance Code:unknown风险等级:5.84
Base Number Matches:1

M6MGB331S8AKT 数据手册

 浏览型号M6MGB331S8AKT的Datasheet PDF文件第2页浏览型号M6MGB331S8AKT的Datasheet PDF文件第3页 
Renesas LSIs  
Preliminary  
Notice: This is not a final specification.  
Some parametric limits are subject to change.  
M6MGB/T331S8AKT  
33,554,432-BIT (2,097,152 - WORD BY 16-BIT /4,194,304-WORD BY 8-BIT) CMOS  
FLASH MEMORY &  
8,388,608-BIT (524,288-WORD BY 16-BIT /1,048,576-WORD BY 8-BIT) CMOS SRAM  
Stacked - µ MCP (micro Multi Chip Package)  
Description  
The M6MGB/T331S8AKT is suitable for a high  
performance cellular phone and a mobile PC that are  
required to be small mounting area, weight and small  
power dissipation  
The M6MGB/T331S8AKT is a Stacked micro Multi Chip  
Package (S- mMCP) that contents 32M-bit Flash memory  
and 8M-bit Static RAM in a 52-pin TSOP for lead free use.  
32M-bit Flash memory is a 4,194,304 bytes / 2,097,152  
words, , single power supply and high performance non-  
volatile memory fabricated by CMOS technology for the  
peripheral circuit and DINOR (Divided bit-line NOR IV)  
architecture for the memory cell. All memory blocks are  
locked and can not be programmed or erased, when F-WP#  
is low. Using Software Lock Release function, program or  
erase operation can be executed.  
Features  
Access Time  
Flash  
70ns (Max.)  
SRAM  
85ns (Max.)  
Supply Voltage  
VCC=2.7 ~ 3.0V  
Ta=-40 ~ 85 °C  
52pin TSOP(Type-II),  
Ambient Temperature  
Package  
8M-bit SRAM is a 1,048,576 bytes / 524,288 words  
asynchronous SRAM fabricated by CMOS technology for the  
peripheral circuit .  
Lead pitch 0.4mm  
Outer-lead finishing:Sn-Cu  
Application  
Mobile communication products  
PIN CONFIGURATION (TOP VIEW)  
A15  
A14  
A13  
A12  
A11  
A10  
A9  
A16  
1
2
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
BYTE#  
S-UB#  
GND  
3
4
S-LB#  
5
DQ15/A-1  
DQ7  
6
7
A8  
DQ14  
DQ6  
8
A19  
9
DQ13  
DQ5  
S-CE1#  
WE#  
F-RP#  
F-WP#  
S-VCC  
S-CE2  
DU  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
DQ12  
DQ4  
M6MGB/T331S8AKT  
F-VCC  
DQ11  
DQ3  
DQ10  
DQ2  
A20  
A18  
A17  
DQ9  
DQ1  
A7  
DQ8  
A6  
DQ0  
A5  
A4  
OE#  
GND  
F-CE#  
A0  
A3  
A2  
Outline  
A1  
52PTJ-A  
10.49 mm  
F-VCC  
S-VCC  
GND  
A-1 - A18  
A19 - A20  
:Vcc for Flash  
:Vcc for SRAM  
:GND for Flash/SRAM  
:Flash/SRAM common Address  
:Address for Flash  
F-WP#  
F-RP#  
BYTE#  
S-LB#  
S-UB#  
DU  
:Flash Write protect  
:Flash Reset Power Down  
:Flash/SRAM Byte Enable  
:SRAM Lower Byte  
:SRAM Upper Byte  
:Do not use  
DQ0 - DQ15 :Data I/O  
F-CE#  
S-CE1#  
S-CE2  
OE#  
:Flash Chip Enable  
:SRAM Chip Enable1  
:SRAM Chip Enable2  
:Flash/SRAM Output Enable  
:Flash/SRAM Write Enable  
WE#  
1
Rev.0.2.48a_bebz  

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