Datasheet > M66236FP

M66236FP

更新时间： 2024-01-03 03:03:10

品牌	Logo	应用领域
三菱 - MITSUBISHI		时钟发生器
页数	文件大小	规格书
5页	60K
描述
STANDARD CLOCK GENERATOR

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M66236FP 技术参数

生命周期：	Obsolete	零件包装代码：	SOIC
包装说明：	SOP, SOP16,.3	针数：	16
Reach Compliance Code：	unknown	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	5.29
JESD-30 代码：	R-PDSO-G16	长度：	10.1 mm
端子数量：	16	最高工作温度：	70 °C
最低工作温度：		最大输出时钟频率：	25 MHz
封装主体材料：	PLASTIC/EPOXY	封装代码：	SOP
封装等效代码：	SOP16,.3	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE	电源：	5 V
主时钟/晶体标称频率：	25 MHz	认证状态：	Not Qualified
座面最大高度：	2.1 mm	子类别：	Clock Generators
最大压摆率：	65 mA	最大供电电压：	5.25 V
最小供电电压：	4.75 V	标称供电电压：	5 V
表面贴装：	YES	技术：	CMOS
温度等级：	COMMERCIAL	端子形式：	GULL WING
端子节距：	1.27 mm	端子位置：	DUAL
宽度：	5.3 mm	uPs/uCs/外围集成电路类型：	CLOCK GENERATOR, OTHER

M66236FP 数据手册

MITSUBISHI DIGITAL ASSP

M66236FP

STANDARD CLOCK GENERATOR

FUNCTION

clock output from CKO is output. From 1/2 divider synchro-

nous clock output (CKO/2), 1/2 divider signal of sync clock

output from CKO is output. From 1/2 divider synchronous

clock inverted output (CKO/2), inverted signal of that output

from CKO/2 is output.

From one-shot pulse output (PULSE), one-shot pulse which

is almost equal to two cycles of clock input signal is output

after trigger input signal falls. From continuous clock output

(CNTCK), sync clock is output when trigger input signal is on

“L” level; when trigger input signal is on “H” level, clock input

signal, which is input to CLK IN, is output.

All these outputs but continuous clock output are suspended

when trigger input signal is on “H” level: Synchronous clock

output, 1/2 divider synchronous clock output and one-shot

pulse output stay on “L” level, and synchronous clock inverted

output and 1/2 divider synchronous clock inverted output stay

on “H” level.

M66236 standard clock generator outputs clock input signal,

which is input to CLK IN, synchronously with optional trigger

signal, which is input to TR.

Sync clock output timing is determined by trigger input signal

fall edge. Time-lag between trigger input signal fall edge and

sync clock output equals the sum of clock input signal “L”

pulse width and M66236 internal delay. Variation in this lag

(∆t) is ±5ns, ensuring excellent synchronizing accuracy.

There are six types of outputs: synchronous clock output

(CKO), synchronous clock inverted output (CKO), 1/2 divider

synchronous clock output (CKO/2), 1/2 divider synchronous

clock inverted output (CKO/2), one-shot pulse output

(PULSE) and continuous clock output (CNTCK).

From synchronous clock output (CKO), sync clock of the

same frequency as clock input signal is output. From syn-

chronous clock inverted output (CKO), inverted signal of sync

1/fIN

CLK IN

w(TR)

∆t

sp(CKO)

ss(CKO)

CKO

ss(CKO)

∆t

sp(CKO/2)

ss(CKO/2)

CKO/2

ss(CKO/2)

∆t

ss(PULSE)

PULSE

CNTCK

w(PULSE)

∆t

ss(CNTCK)

Note 1: tSS (CKO, CKO, CKO/2, CKO/2 and PULSE) equals the sum of input clock “L” width and α . Value α refers to internal delay in M66236. Under envi-

ronment where temperature and VCC do not change, value α and tss are kept constant. Dispersion of tss under such conditions is defined as ∆t [syn-

chronizing precision (jitter)].

Note 2: Outputs (CKO, CKO, CKO/2, CKO/2 PULSE and CNTCK) are unknown until trigger input TR reaches “H” level for the first time after power-on.

123 4 5

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M66-238	MICRO-ELECTRONICS	Tone/Music Synthesizer, PBCY3, TO-92	获取价格
M66238FP	RENESAS	Standard Clock Generator with PLL Frequency Synthesizer	获取价格
M66238FP	MITSUBISHI	STANDARD CLOCK GENERATOR WITH PLL FREQUENCY SYNTHESIZER	获取价格
M66-239	MICRO-ELECTRONICS	Tone/Music Synthesizer, PBCY3, TO-92	获取价格
M66239FP	RENESAS	High Speed Standard Clock Generator With Frequency Synthesizer	获取价格

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