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M5M564R16DTP-10

更新时间： 2024-11-29 22:55:35
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三菱 - MITSUBISHI /
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7页 92K
描述
1048576-BIT (65536-WORD BY 16-BIT) CMOS STATIC RAM

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M5M564R16DTP-10 数据手册

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MITSUBISHI LSIs  
1998.6.18 Ver.A  
M5M564R16DJ,TP-10,-12,-15  
PRELIMINARY  
Notice: This is not a final specification.  
Some parametric limits are subject to change.  
1048576-BIT (65536-WORD BY 16-BIT) CMOS STATIC RAM  
DESCRIPTION  
The M5M564R16D is a family of 65536-word by 16-bit  
static RAMs, fabricated with the high performance CMOS  
process and designed for high speed application. These  
devices operate on a single 3.3V supply, and are directly  
TTL compatible.  
PIN CONFIGURATION (TOP VIEW)  
A0  
44  
43  
A15  
A14  
A13  
1
2
ADDRESS  
INPUTS  
A1  
A2  
A3  
ADDRESS  
INPUTS  
3
4
42  
41  
They include a power down feature as well. In write  
and read cycles, the lower and upper bytes are able  
to be controled either togethe or separately by LB  
and UB.  
OE OUTPUT ENABLE  
INPUT  
BYTE  
CONTROL  
INPUTS  
A4  
S
CHIP  
SELECT  
INPUTS  
5
6
40  
39  
UB  
LB  
DQ1  
DQ2  
DQ3  
DQ4  
7
8
38  
37  
DQ16  
DQ15  
DATA  
INPUTS/  
OUTPUTS  
DATA  
INPUTS/  
OUTPUTS  
9
36  
35  
DQ14  
DQ13  
FEATURES  
10  
•Fast access time  
M5M564R16DJ,TP-10 ... 10ns(max)  
M5M564R16DJ,TP-12 ... 12ns(max)  
M5M564R16DJ,TP-15 ... 15ns(max)  
Active .................. 363mW(typ)  
(3.3V)  
(0V)  
VCC  
GND  
DQ5  
11  
12  
34  
33  
GND  
VCC  
DQ12  
(0V)  
(3.3V)  
13  
32  
31  
DATA  
DQ6  
DQ7  
DQ8  
W
A5  
A6  
14  
15  
16  
DQ11  
DQ10 INPUTS/  
DATA  
INPUTS/  
OUTPUTS  
•Low power dissipation  
30  
OUTPUTS  
29  
28  
DQ9  
N.C  
A12  
A11  
A10  
WRITE  
CONTROL  
INPUT  
17  
•Single +3.3V power supply  
18  
19  
20  
27  
•Fully static operation : No clocks, No refresh  
•Common data I/O  
26  
25  
24  
ADDRESS  
INPUTS  
ADDRESS  
INPUTS  
A7  
A9  
A8  
N.C  
21  
22  
•Easy memory expansion by S  
N.C  
23  
•Three-state outputs : OR-tie capability  
•OE prevents data contention in the I/O bus  
•Directly TTL compatible : All inputs and outputs  
•Separate control of lower and upper bytes by LB and UB  
Outline 44P0K(J)  
44P3W-H(TP)  
APPLICATION  
High-speed memory system  
PACKAGE  
M5M564R16DJ  
: 44pin 400mil SOJ  
M5M564R16DTP : 44pin 400mil TSOP(II)  
FUNCTION  
state. (LB and/or UB=L, S=L)  
The operation mode of the M5M564R16D is  
determined by a combination of the device control  
inputs S, W, OE, LB, and UB. Each mode is  
summarized in the function table.  
When setting LB at a high level and other pins are in  
an active state, upper-Byte are in a selectable mode  
in which both reading and writing are enable, and  
lower-Byte are in a non-selectable mode. And when  
setting UB at a high level and other pins are in an  
active state, lower-Byte are in a selectable mode in  
which both reading and writing are enable, and upper-  
Byte are in a non-selectable mode.  
When setting LB and UB at a high level or S at high  
level, the chip is in a non-selectable mode in which  
both reading and writing are disabled. In this mode,  
the output stage is in a high-impedance state,  
allowing OR-tie with other chips and memory  
expansion by LB, UB and S.  
A write cycle is executed whenever the low level W  
overlaps with low level LB and/or low level UB and low  
level S. The address must be set-up before write cycle  
and must be stable during the entire cycle.  
The data is latched into a cell on the traling edge of  
W, LB, UB or S, whichever occurs first, requiring the  
set-up and hold time relative to these edge to be  
maintained. The output enable input OE directly  
controls the output stage. Setting the OE at a high level,  
the output stage is in a high impedance state, and the  
data bus contention problem in the write cycle is  
eliminated.  
Signal-S controls the power-down feature. When S  
goes high, power dissapation is reduced extremely.  
The access time from S is equivalent to the address  
access time.  
A read cycle is excuted by setting W at a high level  
and OE at a low level while LB and/or UB and S are in  
an active  
MITSUBISHI  
ELECTRIC  
1
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