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M5M5256DVP-85VXL

更新时间： 2024-02-04 22:17:24

品牌	Logo	应用领域
三菱 - MITSUBISHI		/
页数	文件大小	规格书
7页	65K
描述
262144-BIT (32768-WORD BY 8-BIT) CMOS STATIC RAM

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M5M5256DVP-85VXL 数据手册

'97.4.7

MITSUBISHI LSIs

M5M5256DFP,VP,RV -70VLL,-85VLL,

-70VXL,-85VXL

262144-BIT (32768-WORD BY 8-BIT) CMOS STATIC RAM

AC ELECTRICAL CHARACTERISTICS (Ta = 0~70°C, Vcc=3.3±0.3V, unless otherwise noted )

(1) MEASUREMENT CONDITIONS

Input pulse level··················I·HV=2.2V,VIL=0.4V

Input rise and fall time··········5ns

Reference level···················O·VH=VOL=1.5V

Output loads·························Fig.1,CL=30pF (-70VLL,-70VXL )

CL=50pF (-85VLL,-85VXL )

(Including

scope and JIG)

CL=5pF (for ten,tdis)

Transition is measured ±500mV from steady

state voltage. (for ten,tdis)

Fig.1 Output load

(2) READ CYCLE

Limits

Unit

Symbol

Parameter

Read cycle time

-70VLL, VXL -85VLL, VXL

Min Max Min Max

tCR

ta(A)

ta(S)

ta(OE)

tdis(S)

Address access time

Chip select access time

Output enable access time

Output disable time after /S high

tdis(OE) Output disable time after /OE high

ten(S)

Output enable time after /S low

ten(OE) Output enable time after /OE low

tV(A)

Data valid time after address

(3) WRITE CYCLE

Limits

-70VLL, VXL -85VLL, VXL

Min Max Min Max

Symbol

Parameter

Unit

tCW

tw(W)

tsu(A)

tsu(A-WH)

tsu(S)

tsu(D)

th(D)

trec(W)

tdis(W)

tdis(OE)

ten(W)

ten(OE)

Write cycle time

Write pulse width

Address setup time

Address setup time with respect to /W high

Chip select setup time

Data setup time

Data hold time

Write recovery time

Output disable time from /W low

Output disable time from /OE high

Output enable time from /W high

Output enable time from /OE low

MITSUBISHI

ELECTRIC

1 2 345 6 7

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