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M5M4V4265CTP-5S PDF预览

M5M4V4265CTP-5S

更新时间： 2024-11-28 22:16:55
品牌 Logo 应用领域
三菱 - MITSUBISHI /
页数 文件大小 规格书
31页 313K
描述
EDO (HYPER PAGE) MODE 4194304-BIT (262144-WORD BY 16-BIT) DYNAMIC RAM

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M5M4V4265CTP-5S 数据手册

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MITSUBISHI LSIs  
M5M4V4265CJ,TP-5,-6,-7,-5S,-6S,-7S  
EDO (HYPER PAGE) MODE 4194304-BIT (262144-WORD BY 16-BIT) DYNAMIC RAM  
DESCRIPTION  
PIN CONFIGURATION (TOP VIEW)  
This is a family of 262144-word by 16-bit dynamic RAMs with EDO  
mode fuction, fabricated with the high performance CMOS  
process, and is ideal for the buffer memory systems of personal  
computer graphics and HDD where high speed, low power  
dissipation, and low costs are essential. The use of double-layer  
metalization process technology and a single-transistor dynamic  
storage stacked capacitor cell provide high circuit density at  
reduced costs. The lower supply (3.3V) operation, due to the  
optimization of transistor structure, provides low power dissipation  
while maintaining high speed operation. Multiplexed address inputs  
permit both a reduction in pins and an increase in system  
densities. Self or extended refresh current is low enough for  
battery back-up application. This device has 2CAS and 1W  
terminals with a refresh cycle of 512 cycles every 8.2ms.  
1
2
(3.3V)VCC  
DQ1  
40 VSS(0V)  
39  
DQ16  
38  
DQ2  
3
4
DQ15  
37  
36  
35  
DQ14  
DQ3  
DQ4  
5
6
DQ13  
(3.3V)VCC  
DQ5  
VSS(0V)  
7
8
9
34 DQ12  
33 DQ11  
DQ6  
DQ7  
32  
31  
30  
29  
28  
DQ10  
DQ9  
NC  
DQ8 10  
FEATURES  
NC  
NC  
W
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
Power  
dissipa-  
tion  
OE  
access  
time  
RAS  
access  
time  
CAS  
access access  
time time  
Address  
Cycle  
time  
(min.ns)  
LCAS  
Type name  
UCAS  
OE  
(typ.mW)  
(max.ns) (max.ns) (max.ns) (max.ns)  
27  
26  
RAS  
NC  
A0  
M5M4V4265CXX-5,-5S  
M5M4V4265CXX-6,-6S  
M5M4V4265CXX-7,-7S  
XX=TP,J  
13  
15  
20  
25  
30  
35  
50  
60  
70  
13  
15  
20  
408  
363  
333  
90  
110  
130  
A8  
25 A7  
24  
23  
22  
21  
A6  
A1  
A2  
Standard 40 pin SOJ, 44 pin TSOP (II)  
Single 3.3±0.3V supply  
Low stand-by power dissipation  
CMOS Input level  
A5  
A4  
A3  
VSS(0V)  
(3.3V)VCC  
1.8mW (Max)  
CMOS Input level  
360µW (Max) *  
Operating power dissipation  
M5M4V4265CXX-5,-5S  
M5M4V4265CXX-6,-6S  
M5M4V4265CXX-7,-7S  
Self refresh capability *  
Self refresh current  
Extended refresh capability  
Extended refresh current  
EDO mode (512-column random access), Read-modify-write, RAS-  
only refresh, CAS before RAS refresh, Hidden refresh capabilities.  
Early-write mode, OE and W to control output buffer impedance  
512 refresh cycles every 8.2ms (A0~A8)  
Outline 40P0K (400mil SOJ)  
486mW (Max)  
432mW (Max)  
396mW (Max)  
1
2
(3.3V)VCC  
DQ1  
44 VSS(0V)  
43  
DQ16  
100µA (Max)  
100µA (Max)  
42  
DQ2  
3
4
DQ15  
41  
40  
39  
DQ14  
DQ13  
DQ3  
DQ4  
5
6
(3.3V)VCC  
DQ5  
VSS(0V)  
DQ12  
7
8
38  
512 refresh cycles every 128ms (A0~A8) *  
DQ11  
DQ10  
DQ9  
DQ6  
37  
36  
Byte or word control for Read/Write operation (2CAS, 1W type)  
* : Applicable to self refresh version (M5M4V4265CJ,TP-5S,-6S,  
-7S : option) only  
DQ7  
9
10  
DQ8  
35  
APPLICATION  
Microcomputer memory, Refresh memory for CRT, Frame buffer  
NC  
NC  
W
32  
31  
30  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
NC  
memory for CRT  
LCAS  
PIN DESCRIPTION  
UCAS  
OE  
Pin name  
A0~A8  
Function  
Address inputs  
29  
28  
RAS  
NC  
A0  
A8  
DQ1~DQ16  
RAS  
Data inputs / outputs  
27 A7  
Row address strobe input  
26  
25  
24  
23  
A6  
A1  
A2  
Lower byte control  
column address strobe input  
LCAS  
A5  
A4  
A3  
Upper byte control  
UCAS  
W
column address strobe input  
(3.3V)VCC  
VSS(0V)  
Write control input  
Output enable input  
Power supply (+3.3V)  
Ground (0V)  
OE  
VCC  
Outline 44P3W-R (400mil TSOP Nomal Bend)  
VSS  
NC : NO CONNECTION  
1
M5M4V4265CJ,TP-5,-5S:under development  
1234567...31

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与M5M4V4265CTP-5S相关器件

型号 品牌 获取价格 描述 数据表
M5M4V4265CTP-6 MITSUBISHI

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 		EDO (HYPER PAGE) MODE 4194304-BIT (262144-WORD BY 16-BIT) DYNAMIC RAM
M5M4V4265CTP-6S MITSUBISHI

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 		EDO (HYPER PAGE) MODE 4194304-BIT (262144-WORD BY 16-BIT) DYNAMIC RAM
M5M4V4265CTP-6ST MITSUBISHI

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 		EDO DRAM, 256KX16, 60ns, CMOS, PDSO40, 0.400 INCH, 0.80 MM PITCH, PLASTIC, TSOP2-44/40
M5M4V4265CTP-6T MITSUBISHI

获取价格

 		EDO DRAM, 256KX16, 60ns, CMOS, PDSO40, 0.400 INCH, 0.80 MM PITCH, PLASTIC, TSOP2-44/40
M5M4V4265CTP-7 MITSUBISHI

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 		EDO (HYPER PAGE) MODE 4194304-BIT (262144-WORD BY 16-BIT) DYNAMIC RAM
M5M4V4265CTP-7S MITSUBISHI

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 		EDO (HYPER PAGE) MODE 4194304-BIT (262144-WORD BY 16-BIT) DYNAMIC RAM
M5M4V4280J-6 MITSUBISHI

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 		Fast Page DRAM, 256KX18, 60ns, CMOS, PDSO40, 0.400 INCH, PLASTIC, SOJ-40
M5M4V4280J-6ST MITSUBISHI

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 		Fast Page DRAM, 256KX18, 60ns, CMOS, PDSO40, 0.400 INCH, PLASTIC, SOJ-40
M5M4V4280J-6T MITSUBISHI

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 		Fast Page DRAM, 256KX18, 60ns, CMOS, PDSO40, 0.400 INCH, PLASTIC, SOJ-40
M5M4V4280J-7 MITSUBISHI

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 		Fast Page DRAM, 256KX18, 70ns, CMOS, PDSO40, 0.400 INCH, PLASTIC, SOJ-40

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