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M54HC174 PDF预览

M54HC174

更新时间: 2024-11-24 22:46:39
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 触发器
页数 文件大小 规格书
11页 249K
描述
HEX D-TYPE FLIP FLOP WITH CLEAR

M54HC174 数据手册

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M54HC174  
M74HC174  
HEX D-TYPE FLIP FLOP WITH CLEAR  
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HIGH SPEED  
fMAX = 71 MHz (TYP.) AT VCC = 5 V  
LOW POWER DISSIPATION  
ICC = 4 µA (MAX.) AT TA = 25 °C  
HIGH NOISE IMMUNITY  
VNIH = VNIL = 28 % VCC (MIN.)  
OUTPUT DRIVE CAPABILITY  
10 LSTTL LOADS  
SYMMETRICAL OUTPUT IMPEDANCE  
IOH = IOL = 4 mA (MIN.)  
BALANCED PROPAGATION DELAYS  
tPLH = tPHL  
WIDE OPERATING VOLTAGE RANGE  
B1R  
(Plastic Package)  
F1R  
(Ceramic Package)  
M1R  
(Micro Package)  
C1R  
(Chip Carrier)  
VCC (OPR) = 2 V TO 6 V  
PIN AND FUNCTION COMPATIBLE WITH  
54/74LS174  
ORDER CODES :  
M54HC174F1R  
M74HC174B1R  
M74HC174M1R  
M74HC174C1R  
DESCRIPTION  
The M54/74HC174 is a high speed CMOS HEX D-  
TYPE FLIP-FLOP WITH CLEAR fabricated in sili-  
con gate C2MOS technology. It has the same high  
speed performance of LSTTL combined with true  
CMOS low power consumption.  
PIN CONNECTIONS (top view)  
Information signals applied to D inputs are trans-  
fered to the Q output on the positive going edge of  
the clock pulse. When the CLEAR input is held low,  
the Q outputs are held low independently of the  
other inputs. All inputs are equipped with protection  
circuits against static discharge and transient ex-  
cess voltage.  
INPUT AND OUTPUT EQUIVALENT CIRCUIT  
NC =  
No Internal  
Connection  
October 1992  
1/11  

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