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M48T59V-70MH1F PDF预览

M48T59V-70MH1F

更新时间: 2024-11-14 05:46:51
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 静态存储器
页数 文件大小 规格书
32页 376K
描述
5.0 or 3.3 V, 64 Kbit (8 Kbit x 8) TIMEKEEPER® SRAM

M48T59V-70MH1F 数据手册

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M48T59  
M48T59Y, M48T59V  
5.0 or 3.3 V, 64 Kbit (8 Kbit x 8) TIMEKEEPER® SRAM  
Not For New Design  
Features  
Integrated ultra low power SRAM, real-time  
clock, power-fail control circuit, and battery  
Frequency test output for real-time clock  
software calibration  
Automatic power-fail chip deselect and WRITE  
28  
protection  
1
WRITE protect voltages  
(V  
= Power-fail deselect voltage):  
PFD  
– M48T59: V = 4.75 to 5.5 V  
CC  
PCDIP28 (PC)  
battery/crystal  
CAPHAT  
4.5 V V  
4.75 V  
PFD  
– M48T59Y: V = 4.5 to 5.5 V  
CC  
4.2 V V  
– M48T59V : V = 3.0 to 3.6 V  
4.5 V  
PFD  
(a)  
CC  
2.7 V V  
3.0 V  
PFD  
SNAPHAT (SH)  
battery/crystal  
Self-contained battery and crystal in the  
CAPHAT™ DIP package  
Packaging includes a 28-lead SOIC and  
®
SNAPHAT top (to be ordered separately)  
SOIC package provides direct connection for a  
SNAPHAT top which contains the battery and  
crystal  
Microprocessor power-on reset (valid even  
during battery back-up moe)  
28  
Programmable alarm otput active in the  
1
battery back-up mode  
Battery low fag  
SOH28 (MH)  
RoHS compliant  
– Lead-free second level interconnect  
a. Contact local ST sales office for availability of 3.3 V  
version.  
April 2008  
Rev 7  
1/32  
This is information on a product still in production but not recommended for new designs.  
www.st.com  
1

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